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Searched refs:int16 (Results 1 – 25 of 33) sorted by relevance

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/llvm-project-15.0.7/clang/test/SemaOpenCL/
H A Dvec_step.cl7 typedef int int16 __attribute__((ext_vector_type(16)));
11 int16 *auto2;
26 int res11[vec_step(int16) == 16 ? 1 : -1];
30 …int res14 = vec_step(int16*); // expected-error {{'vec_step' requires built-in scalar or vector ty…
/llvm-project-15.0.7/flang/test/Semantics/
H A Dishftc.f905 use iso_fortran_env, only: int8, int16, int32, int64
14 integer(kind=int16), parameter :: const_arr5(2) = [0,4]
/llvm-project-15.0.7/lldb/examples/python/
H A Dmemory.py68 int16 = int(value, 0)
69 parser.values.data += struct.pack('1H', int16)
80 int16 = int(value, 0)
81 parser.values.data += struct.pack('1h', int16)
/llvm-project-15.0.7/clang/lib/Headers/
H A Dopencl-c.h9151 int16 __ovld __cnfn hadd(int16, int16);
9257 int16 __ovld __cnfn clamp(int16, int16, int16);
9458 int16 __ovld __cnfn mad_hi(int16, int16, int16);
9510 int16 __ovld __cnfn mad_sat(int16, int16, int16);
9562 int16 __ovld __cnfn max(int16, int16);
9654 int16 __ovld __cnfn min(int16, int16);
9991 int16 __ovld __cnfn mad24(int16, int16, int16);
10979 int16 __ovld __cnfn bitselect(int16, int16, int16);
11059 int16 __ovld __cnfn select(int16, int16, int16);
18212 int16 __ovld amd_max3(int16 src0, int16 src1, int16 src2);
[all …]
H A Dopencl-c-base.h167 typedef int int16 __attribute__((ext_vector_type(16))); typedef
568 #define as_int16(x) __builtin_astype((x), int16)
/llvm-project-15.0.7/libclc/generic/include/clc/math/
H A Dgentype.inc45 #define __CLC_INTN int16
103 #define __CLC_INTN int16
163 #define __CLC_INTN int16
/llvm-project-15.0.7/flang/module/
H A Diso_fortran_env.f9057 int16 = merge(selectedInt16, merge(-2, -1, selectedInt16 >= 0), &
75 logical8 = int8, logical16 = int16, logical32 = int32, logical64 = int64
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dattr-arm-sve-vector-bits-types.c46 DEFINE_STRUCT(int16)
60 DEFINE_UNION(int16)
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Tosa/IR/
H A DTosaOps.td1668 bool to 16 Boolean int16
1670 signed 8 to signed 16 int8 int16
1672 signed 16 to signed 8 int16 int8
1673 signed 16 to signed 32 int16 int32
1675 signed 32 to signed 16 int32 int16
1705 signed 8 to 16 int8 int16
1707 signed 16 to 8 int16 int8
1708 signed 16 to 16 int16 int16
1709 signed 16 to 32 int16 int32
1711 signed 32 to 16 int32 int16
[all …]
H A DTosaTypesBase.td75 // int16 : symmetric per tensor, signed
80 Tosa_QuantizedType<"int16", [16, 0], 1>,
/llvm-project-15.0.7/libclc/generic/include/clc/integer/
H A Dinteger-gentype.inc21 #define __CLC_GENTYPE int16
H A Dgentype.inc322 #define __CLC_GENTYPE int16
324 #define __CLC_S_GENTYPE int16
389 #define __CLC_S_GENTYPE int16
/llvm-project-15.0.7/mlir/test/Integration/Dialect/SparseTensor/taco/
H A Dtest_tensor_types.py16 pt.int8, pt.int16, pt.int32, pt.int64, pt.float16, pt.float32, pt.float64
/llvm-project-15.0.7/mlir/test/Integration/Dialect/SparseTensor/taco/tools/
H A Dmlir_pytaco_api.py39 int16 = mlir_pytaco.DType(mlir_pytaco.Type.INT16) variable
/llvm-project-15.0.7/mlir/test/python/ir/
H A Darray_attributes.py215 array = np.array([[1, 2, 3], [4, 5, 6]], dtype=np.int16)
241 array = np.array([[1, 2, 3], [4, 5, 6]], dtype=np.int16)
/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Dstackified-debug.ll27 ; CHECK: .int16 4 # Loc expr size
39 ; CHECK: .int16 4 # Loc expr size
/llvm-project-15.0.7/libclc/generic/lib/relational/
H A Disequal.cl13 _CLC_DEFINE_ISEQUAL(int16, isequal, float16, float16)
/llvm-project-15.0.7/libclc/generic/include/clc/
H A Dclctypes.h53 typedef __attribute__((ext_vector_type(16))) int int16; typedef
H A Das_type.h55 #define as_int16(x) __builtin_astype(x, int16)
/llvm-project-15.0.7/openmp/libomptarget/plugins/amdgpu/impl/
H A Dmsgpack.def32 X(int16, 3, read_size_field_s16, 0xd1, 0xd1)
H A Dmsgpack.h161 case msgpack::int16: in handle_msgpack_given_type()
/llvm-project-15.0.7/libclc/generic/include/clc/relational/
H A Dfloatn.inc33 #define __CLC_INTN int16
/llvm-project-15.0.7/llvm/test/MC/WebAssembly/
H A Dcomdat-sections.ll22 ; ASM-NEXT: .int16 4 # DWARF version number
/llvm-project-15.0.7/libclc/generic/include/clc/async/
H A Dgentype.inc98 #define __CLC_GENTYPE int16
/llvm-project-15.0.7/mlir/test/Integration/Dialect/SparseTensor/python/
H A Dtest_stress.py45 (np.int16, ir.IntegerType.get_signless(16, context=context)),

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