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/llvm-project-15.0.7/llvm/test/Analysis/BlockFrequencyInfo/
H A Dirreducible_loop_crash.ll11 for.inc:
16 br i1 %tobool7, label %for.inc.9, label %for.inc
19 br i1 %tobool7, label %for.inc.9.1, label %for.inc
28 br i1 %tobool7, label %for.inc.9.2, label %for.inc
31 br i1 %tobool7, label %for.inc.9.3, label %for.inc
34 br i1 %tobool7, label %for.inc.9.4, label %for.inc
37 br i1 %tobool7, label %for.inc.9.5, label %for.inc
40 br i1 %tobool7, label %for.inc.9.6, label %for.inc
43 br i1 %tobool7, label %for.inc.9.7, label %for.inc
46 br i1 %tobool7, label %for.inc.9.8, label %for.inc
[all …]
H A Ddouble_exit.ll34 %J.0 = phi i32 [ %I.0, %outer ], [ %inc, %inner.inc ]
49 inner.inc:
51 %inc = add nsw i32 %J.0, 1
57 outer.inc:
101 ; Pseudo-edges = outer.inc
114 ; Pseudo-edges = middle.inc @ 1/5, outer.inc @ 1/5
120 %K.0 = phi i32 [ %J.0, %middle ], [ %inc, %inner.inc ]
130 br i1 %tobool, label %outer.inc, label %inner.inc, !prof !0 ; 3:1
135 inner.inc:
143 middle.inc:
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/AArch64/
H A Dpr47329.ll15 br i1 undef, label %for.body9, label %for.inc
23 br i1 undef, label %for.body9.1, label %for.inc.1
31 br i1 undef, label %for.body9.2, label %for.inc.2
39 br i1 undef, label %for.body9.3, label %for.inc.3
47 br i1 undef, label %for.body9.4, label %for.inc.4
55 br i1 undef, label %for.body9.5, label %for.inc.5
63 br i1 undef, label %for.body9.5.1, label %for.inc.5.1
71 br i1 undef, label %for.body9.5.2, label %for.inc.5.2
79 br i1 undef, label %for.body9.5.3, label %for.inc.5.3
87 br i1 undef, label %for.body9.5.4, label %for.inc.5.4
[all …]
/llvm-project-15.0.7/llvm/test/MC/X86/AlignedBundling/
H A Dautogen-inst-offset-padding.s15 inc %eax
25 inc %eax
35 inc %eax
45 inc %eax
55 inc %eax
65 inc %eax
75 inc %eax
85 inc %eax
95 inc %eax
105 inc %eax
[all …]
H A Dautogen-inst-offset-align-to-end.s15 inc %eax
26 inc %eax
37 inc %eax
48 inc %eax
59 inc %eax
70 inc %eax
81 inc %eax
92 inc %eax
103 inc %eax
114 inc %eax
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dhwloop4.ll27 %inc = add i32 %i.05, 1
29 store i32 %inc, i32* %arrayidx.inc, align 4
30 %inc.1 = add i32 %i.05, 2
32 store i32 %inc.1, i32* %arrayidx.inc.1, align 4
33 %inc.2 = add i32 %i.05, 3
35 store i32 %inc.2, i32* %arrayidx.inc.2, align 4
36 %inc.3 = add i32 %i.05, 4
38 store i32 %inc.3, i32* %arrayidx.inc.3, align 4
41 store i32 %inc.4, i32* %arrayidx.inc.4, align 4
44 store i32 %inc.5, i32* %arrayidx.inc.5, align 4
[all …]
/llvm-project-15.0.7/llvm/test/MC/AVR/
H A Dregisters.s8 inc xl
9 inc xh
10 inc yl
11 inc yh
12 inc zl
13 inc zh
26 ; CHECK-INST: inc r26
27 ; CHECK-INST: inc r27
28 ; CHECK-INST: inc r28
29 ; CHECK-INST: inc r29
[all …]
H A Dinst-inc.s7 inc r12
8 inc r29
9 inc r6
10 inc r20
11 inc r0
12 inc r31
21 ; CHECK-INST: inc r12
22 ; CHECK-INST: inc r29
23 ; CHECK-INST: inc r6
24 ; CHECK-INST: inc r20
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopInterchange/
H A Dreductions-across-inner-and-outer-loop.ll68 %sum.inc.lcssa = phi i64 [ %sum.inc, %for2 ]
74 %sum.inc.lcssa2 = phi i64 [ %sum.inc.lcssa, %for1.inc ]
105 %sum.inc.lcssa = phi i64 [ %sum.inc, %for2 ]
111 %sum.inc.lcssa2 = phi i64 [ %sum.inc.lcssa, %for1.inc ]
143 %sum.inc.lcssa = phi i64 [ %sum.inc, %for2 ]
149 %sum.inc.lcssa2 = phi i64 [ %sum.inc.lcssa, %for1.inc ]
181 %sum.inc.lcssa = phi i64 [ %sum.inc, %for2 ]
187 %sum.inc.lcssa2 = phi i64 [ %sum.inc.lcssa, %for1.inc ]
218 %sum.inc.lcssa = phi i64 [ %sum.inc, %for2 ]
254 %float.inner.inc.inc = fadd fast float %float.inner.inc, %vB
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/BranchProbabilityInfo/
H A Dzero_heuristics.ll17 %inc.iv = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
27 br label %for.inc
29 for.inc:
31 %inc = add nuw nsw i32 %inc.iv, 1
50 %inc.iv = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
60 br label %for.inc
62 for.inc:
64 %inc = add nuw nsw i32 %inc.iv, 1
83 %inc.iv = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
95 for.inc:
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Dialect/LLVMIR/
H A DCMakeLists.txt4 mlir_tablegen(LLVMOpsAttrDefs.h.inc -gen-attrdef-decls)
5 mlir_tablegen(LLVMOpsAttrDefs.cpp.inc -gen-attrdef-defs)
9 mlir_tablegen(LLVMOps.h.inc -gen-op-decls)
10 mlir_tablegen(LLVMOps.cpp.inc -gen-op-defs)
11 mlir_tablegen(LLVMOpsDialect.h.inc -gen-dialect-decls)
13 mlir_tablegen(LLVMOpsEnums.h.inc -gen-enum-decls)
14 mlir_tablegen(LLVMOpsEnums.cpp.inc -gen-enum-defs)
18 mlir_tablegen(LLVMIntrinsicOps.h.inc -gen-op-decls)
19 mlir_tablegen(LLVMIntrinsicOps.cpp.inc -gen-op-defs)
47 mlir_tablegen(NVVMOpsEnums.h.inc -gen-enum-decls)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/LoopNestAnalysis/
H A Dnests-with-lcssa.ll31 %j.03 = phi i32 [ 0, %for.j.ph ], [ %inc, %for.j.inc ]
35 br label %for.j.inc
48 br label %for.i.inc
108 %k.03 = phi i32 [ 0, %for.k.ph ], [ %inc, %for.k.inc ]
113 br label %for.k.inc
128 br label %for.j.inc
143 br label %for.i.inc
203 %k.03 = phi i32 [ 0, %for.k.ph ], [ %inc, %for.k.inc ]
208 br label %for.k.inc
221 br label %for.j.inc
[all …]
/llvm-project-15.0.7/mlir/include/mlir/IR/
H A DCMakeLists.txt6 mlir_tablegen(BuiltinAttributes.h.inc -gen-attrdef-decls)
7 mlir_tablegen(BuiltinAttributes.cpp.inc -gen-attrdef-defs)
16 mlir_tablegen(BuiltinDialect.h.inc -gen-dialect-decls)
17 mlir_tablegen(BuiltinDialect.cpp.inc -gen-dialect-defs)
21 mlir_tablegen(BuiltinLocationAttributes.h.inc -gen-attrdef-decls)
22 mlir_tablegen(BuiltinLocationAttributes.cpp.inc -gen-attrdef-defs)
26 mlir_tablegen(BuiltinOps.h.inc -gen-op-decls)
27 mlir_tablegen(BuiltinOps.cpp.inc -gen-op-defs)
31 mlir_tablegen(BuiltinTypes.h.inc -gen-typedef-decls)
32 mlir_tablegen(BuiltinTypes.cpp.inc -gen-typedef-defs)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/ARM/
H A Dmve-maskedldst.ll17 %i.013 = phi i32 [ %inc, %for.inc ], [ 0, %for.body.preheader ]
26 br label %for.inc
29 %inc = add nuw nsw i32 %i.013, 1
51 %i.013 = phi i32 [ %inc, %for.inc ], [ 0, %for.body.preheader ]
60 br label %for.inc
85 %i.013 = phi i32 [ %inc, %for.inc ], [ 0, %for.body.preheader ]
94 br label %for.inc
119 %i.013 = phi i32 [ %inc, %for.inc ], [ 0, %for.body.preheader ]
128 br label %for.inc
153 %i.013 = phi i32 [ %inc, %for.inc ], [ 0, %for.body.preheader ]
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LICM/
H A Dspeculate.ll15 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ]
25 br label %for.inc
28 %inc = add i64 %i.02, 1
47 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ]
57 br label %for.inc
81 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ]
91 br label %for.inc
114 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ]
124 br label %for.inc
147 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ]
[all …]
/llvm-project-15.0.7/clang/include/clang/Basic/
H A DCMakeLists.txt2 clang_tablegen(Diagnostic${component}Kinds.inc
20 clang_tablegen(DiagnosticGroups.inc -gen-clang-diag-groups
24 clang_tablegen(DiagnosticIndexName.inc -gen-clang-diags-index-name
28 clang_tablegen(AttrList.inc -gen-clang-attr-list
45 clang_tablegen(arm_neon.inc -gen-arm-neon-sema
48 clang_tablegen(arm_fp16.inc -gen-arm-neon-sema
51 clang_tablegen(arm_mve_builtins.inc -gen-arm-mve-builtin-def
57 clang_tablegen(arm_mve_builtin_sema.inc -gen-arm-mve-builtin-sema
63 clang_tablegen(arm_sve_builtins.inc -gen-arm-sve-builtins
69 clang_tablegen(arm_sve_typeflags.inc -gen-arm-sve-typeflags
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/Delinearization/
H A Dmultidim_only_ivs_3d_cast.ll25 %i = phi i64 [ %i.inc, %for.i.inc ], [ 0, %entry ]
29 %j = phi i64 [ %j.inc, %for.j.inc ], [ 0, %for.i ]
33 %k = phi i64 [ %k.inc, %for.k.inc ], [ 0, %for.j ]
43 br label %for.k.inc
45 for.k.inc:
46 %k.inc = add i64 %k, 1
47 %k.inc.trunc = trunc i64 %k.inc to i32
51 for.j.inc:
53 %j.inc.trunc = trunc i64 %j.inc to i32
57 for.i.inc:
[all …]
H A Dmultidim_only_ivs_3d.ll21 %i = phi i64 [ 0, %entry ], [ %i.inc, %for.i.inc ]
25 %j = phi i64 [ 0, %for.i ], [ %j.inc, %for.j.inc ]
29 %k = phi i64 [ 0, %for.j ], [ %k.inc, %for.k.inc ]
36 br label %for.k.inc
38 for.k.inc:
39 %k.inc = add nsw i64 %k, 1
40 %k.exitcond = icmp eq i64 %k.inc, %o
43 for.j.inc:
44 %j.inc = add nsw i64 %j, 1
48 for.i.inc:
[all …]
H A Dmultidim_ivs_and_integer_offsets_3d.ll21 %i = phi i64 [ 0, %entry ], [ %i.inc, %for.i.inc ]
25 %j = phi i64 [ 0, %for.i ], [ %j.inc, %for.j.inc ]
29 %k = phi i64 [ 0, %for.j ], [ %k.inc, %for.k.inc ]
39 br label %for.k.inc
41 for.k.inc:
42 %k.inc = add nsw i64 %k, 1
43 %k.exitcond = icmp eq i64 %k.inc, %o
46 for.j.inc:
47 %j.inc = add nsw i64 %j, 1
51 for.i.inc:
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/DFAJumpThreading/
H A Dnegative.ll14 %count = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
22 br label %for.inc
29 for.inc:
70 %count = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
85 for.inc:
103 %count = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
118 for.inc:
136 %count = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
151 for.inc:
193 %count = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/
H A Dinfer-prestart-no-wrap.ll11 %idx.inc = add nsw i32 %idx, 1
12 %idx.inc.sext = sext i32 %idx.inc to i64
13 ; CHECK: %idx.inc.sext = sext i32 %idx.inc to i64
35 %idx.inc = add nuw i32 %idx, 1
36 %idx.inc.sext = zext i32 %idx.inc to i64
37 ; CHECK: %idx.inc.sext = zext i32 %idx.inc to i64
74 %start.inc = add i8 %start, 1
79 %idx = phi i8 [ %start.inc, %entry ], [ %idx.inc, %loop ]
83 %idx.inc = add nsw i8 %idx, 1
94 %start.inc = add i8 %start, 1
[all …]
/llvm-project-15.0.7/clang/include/clang/AST/
H A DCMakeLists.txt1 clang_tablegen(Attrs.inc -gen-clang-attr-classes
5 clang_tablegen(AttrImpl.inc -gen-clang-attr-impl
9 clang_tablegen(AttrTextNodeDump.inc -gen-clang-attr-text-node-dump
13 clang_tablegen(AttrNodeTraverse.inc -gen-clang-attr-node-traverse
17 clang_tablegen(AttrVisitor.inc -gen-clang-attr-ast-visitor
21 clang_tablegen(StmtNodes.inc -gen-clang-stmt-nodes
25 clang_tablegen(DeclNodes.inc -gen-clang-decl-nodes
29 clang_tablegen(TypeNodes.inc -gen-clang-type-nodes
41 clang_tablegen(AbstractTypeReader.inc -gen-clang-type-reader
45 clang_tablegen(AbstractTypeWriter.inc -gen-clang-type-writer
[all …]
/llvm-project-15.0.7/mlir/test/lib/Dialect/Test/
H A DCMakeLists.txt8 mlir_tablegen(TestAttrInterfaces.h.inc -gen-attr-interface-decls)
9 mlir_tablegen(TestAttrInterfaces.cpp.inc -gen-attr-interface-defs)
12 mlir_tablegen(TestOpInterfaces.h.inc -gen-op-interface-decls)
13 mlir_tablegen(TestOpInterfaces.cpp.inc -gen-op-interface-defs)
17 mlir_tablegen(TestAttrDefs.h.inc -gen-attrdef-decls)
18 mlir_tablegen(TestAttrDefs.cpp.inc -gen-attrdef-defs)
27 mlir_tablegen(TestOps.h.inc -gen-op-decls)
28 mlir_tablegen(TestOps.cpp.inc -gen-op-defs)
31 mlir_tablegen(TestOpEnums.h.inc -gen-enum-decls)
32 mlir_tablegen(TestOpEnums.cpp.inc -gen-enum-defs)
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DCMakeLists.txt5 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
8 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
9 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
11 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
12 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
21 tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
22 tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
24 tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank)
26 tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/IRCE/
H A Dvariable-loop-bounds.ll17 ; CHECK: [[PSEUDO_PHI:%[^ ]+]] = phi i32 [ %inc, %for.inc ]
29 %i.017 = phi i32 [ %inc, %for.inc ], [ 0, %entry ]
51 for.inc:
59 ; CHECK: [[PSEUDO_PHI:%[^ ]+]] = phi i32 [ %inc, %for.inc ]
71 %i.017 = phi i32 [ %inc, %for.inc ], [ 0, %entry ]
93 for.inc:
113 %i.017 = phi i32 [ %inc, %for.inc ], [ 0, %entry ]
135 for.inc:
155 %i.017 = phi i32 [ %inc, %for.inc ], [ 0, %entry ]
177 for.inc:
[all …]

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