Searched refs:imms (Results 1 – 9 of 9) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 298 unsigned imms = val & 0x3f; in decodeLogicalImmediate() local 301 int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f)); in decodeLogicalImmediate() 305 unsigned S = imms & (size - 1); in decodeLogicalImmediate() 326 unsigned imms = val & 0x3f; in isValidDecodeLogicalImmediate() local 330 int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f)); in isValidDecodeLogicalImmediate() 334 unsigned S = imms & (size - 1); in isValidDecodeLogicalImmediate()
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| H A D | AArch64InstPrinter.cpp | 130 int64_t imms = Op3.getImm(); in printInst() local 131 if (Opcode == AArch64::UBFMWri && imms != 0x1F && ((imms + 1) == immr)) { in printInst() 133 shift = 31 - imms; in printInst() 134 } else if (Opcode == AArch64::UBFMXri && imms != 0x3f && in printInst() 135 ((imms + 1 == immr))) { in printInst() 137 shift = 63 - imms; in printInst() 138 } else if (Opcode == AArch64::UBFMWri && imms == 0x1f) { in printInst() 141 } else if (Opcode == AArch64::UBFMXri && imms == 0x3f) { in printInst() 144 } else if (Opcode == AArch64::SBFMWri && imms == 0x1f) { in printInst() 147 } else if (Opcode == AArch64::SBFMXri && imms == 0x3f) { in printInst()
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| /llvm-project-15.0.7/llvm/test/DebugInfo/X86/ |
| H A D | dbgcall-site-64-bit-imms.ll | 39 !1 = !DIFile(filename: "dbgcall-site-long-imms.c", directory: "/")
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/AArch64/ |
| H A D | arm64-basic-a64-undefined.txt | 20 # UBFM is undefined when s == 0 and imms<5> or immr<5> is 1.
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARM.td | 478 // 32-bit imms (including global addresses). 481 "32-bit imms">;
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| H A D | ARMInstrThumb.td | 1715 // Two piece imms.
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 2821 : I<(outs regtype:$Rd), (ins regtype:$Rn, imm_type:$immr, imm_type:$imms), 2822 asm, "\t$Rd, $Rn, $immr, $imms", "", []>, 2827 bits<6> imms; 2832 let Inst{15-10} = imms; 2841 // imms<5> and immr<5> must be zero, else ReservedValue(). 2855 imm_type:$imms), 2856 asm, "\t$Rd, $Rn, $immr, $imms", "$src = $Rd", []>, 2861 bits<6> imms; 2866 let Inst{15-10} = imms; 2875 // imms<5> and immr<5> must be zero, else ReservedValue().
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| H A D | SVEInstrFormats.td | 1772 : I<(outs ZPR64:$Zd), (ins logical_imm64:$imms), 1773 asm, "\t$Zd, $imms", 1777 bits<13> imms; 1779 let Inst{17-5} = imms;
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| H A D | AArch64SchedA64FX.td | 2568 // [90] "dupm $Zd, $imms";
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