Searched refs:imm7 (Results 1 – 11 of 11) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrFormats16Instr.td | 162 AddrModeNone, (outs GPRSP:$sp2), (ins GPRSP:$sp1, uimm7_2:$imm7), 163 !strconcat(opstr, "\t$sp2, $sp1, $imm7"), []> { 164 bits<7> imm7; 167 let Inst{9, 8} = imm7{6,5}; 169 let Inst{4 - 0} = imm7{4 - 0};
|
| /llvm-project-15.0.7/lldb/source/Plugins/Process/Utility/ |
| H A D | ARMUtils.h | 358 const uint32_t imm7 = bits(opcode, 6, 0); in ThumbImm7Scaled() local 359 return imm7 * 4; in ThumbImm7Scaled()
|
| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | constants-i64.ll | 242 define i64 @imm7() #0 { 243 ; CHECK-LABEL: imm7:
|
| /llvm-project-15.0.7/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 641 unsigned imm7 = 0; in DecodeTRAP() local 643 imm7 = fieldFromInstruction(insn, 0, 7); in DecodeTRAP() 654 MI.addOperand(MCOperand::createImm(imm7)); in DecodeTRAP()
|
| /llvm-project-15.0.7/lldb/source/Plugins/Instruction/ARM64/ |
| H A D | EmulateInstructionARM64.cpp | 697 uint32_t imm7 = Bits32(opcode, 21, 15); in EmulateLDPSTP() local 765 idx = LSL(llvm::SignExtend64<7>(imm7), scale); in EmulateLDPSTP()
|
| /llvm-project-15.0.7/lld/ELF/Arch/ |
| H A D | RISCV.cpp | 334 uint16_t imm7 = extractBits(val, 7, 7) << 6; in relocate() local 337 insn |= imm11 | imm4 | imm9_8 | imm10 | imm6 | imm7 | imm3_1 | imm5; in relocate()
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedA64FX.td | 2451 // [51] "cmphi $Pd, $Pg/z, $Zn, $imm7"; 2457 // [53] "cmphs $Pd, $Pg/z, $Zn, $imm7"; 2469 // [57] "cmplo $Pd, $Pg/z, $Zn, $imm7"; 2475 // [59] "cmpls $Pd, $Pg/z, $Zn, $imm7";
|
| H A D | SVEInstrFormats.td | 4893 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, immtype:$imm7), 4894 asm, "\t$Pd, $Pg/z, $Zn, $imm7", 4900 bits<7> imm7; 4904 let Inst{20-14} = imm7;
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb.td | 422 // ADD sp, sp, #<imm7> 432 // SUB sp, sp, #<imm7>
|
| H A D | ARMInstrMVE.td | 118 // taddrmode_imm7 := reg[r0-r7] +/- (imm7 << shift) 136 // t2addrmode_imm7 := reg +/- (imm7)
|
| H A D | ARMInstrThumb2.td | 302 // t2addrmode_imm7s4 := reg +/- (imm7 << 2)
|