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/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dhigher-highest-addressing.s16 daddiu $5, $5, %higher(func)
25 # Test the calculation of %higher and %highest:
26 # ((x + 0x80008000) >> 32) & 0xffff (higher)
34 # to %higher.
37 daddiu $6, $6, %higher($L2-$L1+0x300047FFF7FF7)
43 # Check the case where %higher is modified by adding +1.
45 ld $7, %higher ($L2-$L1+0x300047FFF7FF8)($7)
50 # Check the case where both %higher and %highest are modified by adding +1.
52 ld $8, %higher (0x37FFF7FFF8000)($8)
H A Dmacro-la-64bit.s363 # CHECK: daddiu $5, $5, %higher(extern_sym) # encoding: [0x64,0xa5,A,A]
364 # CHECK: # fixup A - offset: 0, value: %higher(extern_sym), …
376 # CHECK: daddiu $5, $5, %higher(extern_sym) # encoding: [0x64,0xa5,A,A]
377 # CHECK: # fixup A - offset: 0, value: %higher(extern_sym)…
388 # CHECK: daddiu $1, $1, %higher(extern_sym) # encoding: [0x64,0x21,A,A]
404 # CHECK: daddiu $5, $5, %higher(extern_sym+8) # encoding: [0x64,0xa5,A,A]
418 # CHECK: daddiu $5, $5, %higher(extern_sym+8) # encoding: [0x64,0xa5,A,A]
430 # CHECK: daddiu $1, $1, %higher(extern_sym-8) # encoding: [0x64,0x21,A,A]
446 # CHECK: daddiu $5, $5, %higher(extern_sym-8) # encoding: [0x64,0xa5,A,A]
459 # CHECK: daddiu $5, $5, %higher(extern_sym-8) # encoding: [0x64,0xa5,A,A]
[all …]
H A Dmacro-li.s.s66 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
67 # N64-NO-PIC: # fixup A - offset: 0, value: %higher([[LAB…
96 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
97 # N64-NO-PIC: # fixup A - offset: 0, value: %higher([[LAB…
118 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
119 # N64-NO-PIC: # fixup A - offset: 0, value: %higher([[LAB…
141 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
142 # N64-NO-PIC: # fixup A - offset: 0, value: %higher([[LAB…
167 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
168 # N64-NO-PIC: # fixup A - offset: 0, value: %higher([[LAB…
[all …]
H A Dmacro-li.d.s31 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
75 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
107 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
139 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
177 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
210 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
258 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
303 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
326 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
349 # N64-NO-PIC: daddiu $1, $1, %higher([[LABEL]]) # encoding: [A,A,0x21,0x64]
[all …]
H A Dmacro-saad.s13 # MIPS64-NEXT: daddiu $1, $1, %higher(foo) # encoding: [0x64,0x21,A,A]
14 # MIPS64-NEXT: # fixup A - offset: 0, value: %higher(foo), kind: fix…
H A Drelocation.s165 daddiu $2, $3, %higher(foo) // RELOC: R_MIPS_HIGHER foo
386 lui $5, %higher(foo) // RELOC: R_MICROMIPS_HIGHER foo
H A Dmacro-saa.s24 # MIPS64-NEXT: daddiu $1, $1, %higher(foo) # encoding: [0x64,0x21,A,A]
25 # MIPS64-NEXT: # fixup A - offset: 0, value: %higher(foo), kind: fix…
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/llvm-ir/
H A Dload.ll83 ; MIPS3-NEXT: # <MCOperand Expr:(%higher(a))>>
111 ; MIPS64-NEXT: # <MCOperand Expr:(%higher(a))>>
139 ; MIPS64R6-NEXT: # <MCOperand Expr:(%higher(a))>>
246 ; MIPS3-NEXT: # <MCOperand Expr:(%higher(a))>>
274 ; MIPS64-NEXT: # <MCOperand Expr:(%higher(a))>>
410 ; MIPS3-NEXT: # <MCOperand Expr:(%higher(b))>>
438 ; MIPS64-NEXT: # <MCOperand Expr:(%higher(b))>>
573 ; MIPS3-NEXT: # <MCOperand Expr:(%higher(b))>>
737 ; MIPS3-NEXT: # <MCOperand Expr:(%higher(c))>>
914 ; MIPS3-NEXT: # <MCOperand Expr:(%higher(c))>>
[all …]
H A Dstore.ll82 ; MIPS4-NEXT: # <MCOperand Expr:(%higher(a))>>
110 ; MIPS64R6-NEXT: # <MCOperand Expr:(%higher(a))>>
216 ; MIPS4-NEXT: # <MCOperand Expr:(%higher(b))>>
244 ; MIPS64R6-NEXT: # <MCOperand Expr:(%higher(b))>>
350 ; MIPS4-NEXT: # <MCOperand Expr:(%higher(c))>>
378 ; MIPS64R6-NEXT: # <MCOperand Expr:(%higher(c))>>
516 ; MIPS4-NEXT: # <MCOperand Expr:(%higher(d))>>
544 ; MIPS64R6-NEXT: # <MCOperand Expr:(%higher(d))>>
666 ; MIPS4-NEXT: # <MCOperand Expr:(%higher(e))>>
694 ; MIPS64R6-NEXT: # <MCOperand Expr:(%higher(e))>>
[all …]
/llvm-project-15.0.7/lld/test/ELF/
H A Dmips-higher-highest.s13 daddiu $6, $6, %higher(_foo+0x300047FFF7FF7)
15 ld $7, %higher (_foo+0x300047FFF7FF8)($7)
H A Dicf7.s10 ## Check that the selected section has the higher alignment of the two identical sections.
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/indirect-jump-hazard/
H A Djumptables.ll165 ; MIPS64R2-NEXT: daddiu $2, $2, %higher(.LJTI0_0)
175 ; MIPS64R2-NEXT: daddiu $1, $1, %higher(.L.str)
184 ; MIPS64R2-NEXT: daddiu $1, $1, %higher(.L.str.7)
193 ; MIPS64R2-NEXT: daddiu $1, $1, %higher(.L.str.1)
202 ; MIPS64R2-NEXT: daddiu $1, $1, %higher(.L.str.2)
211 ; MIPS64R2-NEXT: daddiu $1, $1, %higher(.L.str.3)
220 ; MIPS64R2-NEXT: daddiu $1, $1, %higher(.L.str.4)
229 ; MIPS64R2-NEXT: daddiu $1, $1, %higher(.L.str.5)
238 ; MIPS64R2-NEXT: daddiu $1, $1, %higher(.L.str.6)
260 ; MIPS64R6-NEXT: daddiu $2, $2, %higher(.LJTI0_0)
[all …]
H A Dlong-calls.ll70 ; N64-NEXT: daddiu $1, $1, %higher(callee)
78 ; N64-NEXT: daddiu $1, $1, %higher(val)
84 ; N64-NEXT: daddiu $1, $2, %higher(memset)
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/longbranch/
H A Dlong-branch-expansion-3.ll29 ; CHECK64R2-NEXT: daddiu $1, $1, %higher(.LBB0_4)
37 ; CHECK64R6-NEXT: daddiu $1, $1, %higher(.LBB0_4)
45 ; CHECK64-IJH-NEXT: daddiu $1, $1, %higher(.LBB0_4)
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dlong-calls.ll41 ; ON64: daddiu $1, $1, %higher(callee)
47 ; ON64: daddiu $1, $2, %higher(memset)
H A Dglobal-address.ll39 ; STATIC-N64: daddiu ${{[0-9]+}}, ${{[0-9]+}}, %higher(s1)
44 ; STATIC-N64: daddiu $[[R3]], $[[R3]], %higher(g1)
H A Dunsized-global.ll14 ; CHECK-NEXT: daddiu $1, $1, %higher(b)
/llvm-project-15.0.7/llvm/test/MC/AsmParser/
H A Dunfinished-op.s3 #CHECK-ERROR: error: instruction must have size higher than 0
/llvm-project-15.0.7/llvm/docs/HistoricalNotes/
H A D2001-01-31-UniversalIRIdea.txt13 static and runtime optimization; some higher-level like type-safety and
20 between languages.) Also, some or most of the higher-level
/llvm-project-15.0.7/libcxx/include/__debug_utils/
H A Drandomize_range.h30 # error Support for unspecified stability is only for C++11 and higher in __debug_randomize_range()
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/abseil/
H A Dcleanup-ctad.rst8 deduction (CTAD), in C++17 and higher.
/llvm-project-15.0.7/llvm/test/ExecutionEngine/RuntimeDyld/PowerPC/
H A Dppc32_elf_rel_addr16.s14 # Check the higher 16-bits of the symbol's absolute address
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dcsr-gfx10.ll4 ; Make sure new higher SGPRs are callee saved
H A Dcall-alias-register-usage1.ll9 ; The parent kernel has a higher VGPR usage than the possible callees.
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/modernize/
H A Duse-using.rst31 This check requires using C++11 or higher to run.

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