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Searched refs:hasVGPRs (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h188 return hasSGPRs(RC) && !hasVGPRs(RC) && !hasAGPRs(RC); in isSGPRClass()
200 return hasVGPRs(RC) && !hasAGPRs(RC) && !hasSGPRs(RC); in isVGPRClass()
205 return hasAGPRs(RC) && !hasVGPRs(RC) && !hasSGPRs(RC); in isAGPRClass()
210 return hasVGPRs(RC) && hasAGPRs(RC) && !hasSGPRs(RC); in isVectorSuperClass()
215 return hasVGPRs(RC) && hasSGPRs(RC) && !hasAGPRs(RC); in isVSSuperClass()
219 static bool hasVGPRs(const TargetRegisterClass *RC) { in hasVGPRs() function
235 return hasVGPRs(RC) || hasAGPRs(RC); in hasVectorRegisters()
H A DSIInstrInfo.cpp966 else if (RI.hasVGPRs(SrcRC) || in copyPhysReg()
971 } else if (RI.hasVGPRs(RC) && RI.isAGPRClass(SrcRC)) { in copyPhysReg()
973 } else if ((Size % 64 == 0) && RI.hasVGPRs(RC) && in copyPhysReg()
1997 if (RI.hasVGPRs(EltRC)) { in expandPostRAPseudo()
2739 return RI.hasVGPRs(RC) && NumInsts <= 6; in canInsertSelect()
4148 if (!MO.isReg() || !RI.hasVGPRs(RI.getRegClassForReg(MRI, MO.getReg()))) { in verifyInstruction()
5803 if (RI.hasVGPRs(DstRC)) { in legalizeOperands()