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Searched refs:getSubtargetInfo (Results 1 – 25 of 57) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiAsmPrinter.cpp154 MCSubtargetInfo STI = getSubtargetInfo(); in emitCallInstruction()
191 MCSubtargetInfo STI = getSubtargetInfo(); in customEmitInstruction()
199 getSubtargetInfo().getFeatureBits()); in emitInstruction()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kAsmPrinter.cpp81 getSubtargetInfo().getFeatureBits()); in emitInstruction()
101 OutStreamer->emitInstruction(TmpInst0, getSubtargetInfo()); in emitInstruction()
/llvm-project-15.0.7/llvm/lib/MC/
H A DMCWasmStreamer.cpp50 if (DF->getSubtargetInfo() == nullptr && EF->getSubtargetInfo()) in mergeFragment()
51 DF->setHasInstructions(*EF->getSubtargetInfo()); in mergeFragment()
H A DMCAssembler.cpp490 const MCSubtargetInfo *STI = EF.getSubtargetInfo(); in writeFragmentPadding()
552 if (!Asm.getBackend().writeNopData(OS, Count, AF.getSubtargetInfo())) in writeFragment()
633 Asm.getBackend().getMaximumNopSize(*NF.getSubtargetInfo()); in writeFragment()
658 NF.getSubtargetInfo())) { in writeFragment()
676 if (!Asm.getBackend().writeNopData(OS, FragmentSize, BF.getSubtargetInfo())) in writeFragment()
885 STI = DF.getSubtargetInfo(); in layout()
893 STI = RF.getSubtargetInfo(); in layout()
966 if (!getBackend().mayNeedRelaxation(F->getInst(), *F->getSubtargetInfo())) in fragmentNeedsRelaxation()
991 getBackend().relaxInstruction(Relaxed, *F.getSubtargetInfo()); in relaxInstruction()
1000 getEmitter().encodeInstruction(Relaxed, VecOS, Fixups, *F.getSubtargetInfo()); in relaxInstruction()
H A DMCELFStreamer.cpp86 if (DF->getSubtargetInfo() == nullptr && EF->getSubtargetInfo()) in mergeFragment()
87 DF->setHasInstructions(*EF->getSubtargetInfo()); in mergeFragment()
503 *getContext().getSubtargetInfo())) in finalizeCGProfileEntry()
579 CheckBundleSubtargets(DF->getSubtargetInfo(), &STI); in emitInstToData()
590 CheckBundleSubtargets(DF->getSubtargetInfo(), &STI); in emitInstToData()
688 mergeFragment(getOrCreateDataFragment(DF->getSubtargetInfo()), DF); in emitBundleUnlock()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMCObjectFileInfo.cpp21 const MCSubtargetInfo *STI = getContext().getSubtargetInfo(); in getTextSectionAlignment()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp329 getSubtargetInfo().getFeatureBits()); in emitInstruction()
338 lowerGETGOTAndEmitMCInsts(MI, getSubtargetInfo()); in emitInstruction()
341 lowerGETFunPLTAndEmitMCInsts(MI, getSubtargetInfo()); in emitInstruction()
344 lowerGETTLSAddrAndEmitMCInsts(MI, getSubtargetInfo()); in emitInstruction()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchAsmPrinter.cpp31 MI->getOpcode(), getSubtargetInfo().getFeatureBits()); in emitInstruction()
/llvm-project-15.0.7/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp177 const MCSubtargetInfo *STI = DC->getSubtargetInfo(); in getItineraryLatency()
196 const MCSubtargetInfo *STI = DC->getSubtargetInfo(); in getLatency()
279 IP->printInst(&Inst, PC, AnnotationsStr, *DC->getSubtargetInfo(), in LLVMDisasmInstruction()
H A DDisassembler.h113 const MCSubtargetInfo *getSubtargetInfo() const { return MSI.get(); } in getSubtargetInfo() function
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCFragment.h172 const MCSubtargetInfo *getSubtargetInfo() const { return STI; } in getSubtargetInfo() function
336 const MCSubtargetInfo *getSubtargetInfo() const { return STI; } in getSubtargetInfo() function
393 const MCSubtargetInfo *getSubtargetInfo() const { return &STI; } in getSubtargetInfo() function
608 const MCSubtargetInfo *getSubtargetInfo() const { return &STI; } in getSubtargetInfo() function
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp130 OutStreamer->emitInstruction(Inst, getSubtargetInfo()); in EmitAndCountInstruction()
1323 OutStreamer->emitInstruction(MI, getSubtargetInfo()); in LowerFAULTING_OP()
1417 OutStreamer->emitInstruction(MCI, getSubtargetInfo()); in LowerPATCHABLE_OP()
1526 OutStreamer->emitCodeAlignment(2, &getSubtargetInfo()); in LowerPATCHABLE_EVENT_CALL()
1622 OutStreamer->emitCodeAlignment(2, &getSubtargetInfo()); in LowerPATCHABLE_TYPED_EVENT_CALL()
1724 OutStreamer->emitCodeAlignment(2, &getSubtargetInfo()); in LowerPATCHABLE_FUNCTION_ENTER()
1754 OutStreamer->emitCodeAlignment(2, &getSubtargetInfo()); in LowerPATCHABLE_RET()
1762 OutStreamer->emitInstruction(Ret, getSubtargetInfo()); in LowerPATCHABLE_RET()
1778 OutStreamer->emitCodeAlignment(2, &getSubtargetInfo()); in LowerPATCHABLE_TAIL_CALL()
1801 OutStreamer->emitInstruction(TC, getSubtargetInfo()); in LowerPATCHABLE_TAIL_CALL()
[all …]
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DLlvmState.h59 const MCSubtargetInfo &getSubtargetInfo() const { in getSubtargetInfo() function
H A DSnippetRepetitor.cpp78 ET.setRegTo(State.getSubtargetInfo(), LoopCounter, LoopCount)) in Repeat()
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCAsmPrinter.cpp53 getSubtargetInfo().getFeatureBits()); in emitInstruction()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600MCInstLower.cpp47 getSubtargetInfo().getFeatureBits()); in emitInstruction()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/X86/
H A DSchedClassResolutionTest.cpp29 X86SchedClassResolutionTest() : STI(State.getSubtargetInfo()) { in X86SchedClassResolutionTest()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonAsmBackend.cpp55 E.encodeInstruction(HMB, VecOS, Fixups, *RF.getSubtargetInfo()); in ReplaceInstruction()
746 Context, *MCII, *RF.getSubtargetInfo(), Inst, in finishLayout()
754 *RF.getSubtargetInfo(), Inst); in finishLayout()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetSchedule.h62 const TargetSubtargetInfo *getSubtargetInfo() const { return STI; } in getSubtargetInfo() function
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFAsmPrinter.cpp142 getSubtargetInfo().getFeatureBits()); in emitInstruction()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp332 smallData(*this, MI, *OutStreamer, Imm, 8, getSubtargetInfo()); in HexagonProcessInstruction()
350 smallData(*this, MI, *OutStreamer, Imm, 4, getSubtargetInfo()); in HexagonProcessInstruction()
747 getSubtargetInfo().getFeatureBits()); in emitInstruction()
776 OutStreamer->emitInstruction(MCB, getSubtargetInfo()); in emitInstruction()
/llvm-project-15.0.7/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYTargetStreamer.cpp34 Streamer.getContext().getSubtargetInfo()); // align naturally in emitAll()
/llvm-project-15.0.7/llvm/include/llvm/MC/MCDisassembler/
H A DMCDisassembler.h219 const MCSubtargetInfo& getSubtargetInfo() const { return STI; } in getSubtargetInfo() function
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZAsmPrinter.cpp147 getSubtargetInfo().getFeatureBits()); in emitInstruction()
656 EmitNop(Ctx, *OutStreamer, 6, getSubtargetInfo()); in LowerFENTRY_CALL()
665 getSubtargetInfo()); in LowerFENTRY_CALL()
699 getSubtargetInfo()); in LowerSTACKMAP()
759 getSubtargetInfo()); in LowerPATCHPOINT()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/Mips/
H A DTargetTest.cpp66 return State.getExegesisTarget().setRegTo(State.getSubtargetInfo(), Reg, in setRegTo()

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