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Searched refs:getRegister (Results 1 – 25 of 111) sorted by relevance

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/llvm-project-15.0.7/bolt/lib/Utils/
H A DUtils.cpp96 return L.getRegister() == R.getRegister(); in operator ==()
98 return L.getRegister() == R.getRegister() && in operator ==()
103 return L.getRegister() == R.getRegister() && L.getOffset() == R.getOffset(); in operator ==()
/llvm-project-15.0.7/llvm/lib/CodeGen/AsmPrinter/
H A DAsmPrinterDwarf.cpp239 OutStreamer->emitCFIDefCfa(Inst.getRegister(), Inst.getOffset()); in emitCFIInstruction()
242 OutStreamer->emitCFIDefCfaRegister(Inst.getRegister()); in emitCFIInstruction()
245 OutStreamer->emitCFILLVMDefAspaceCfa(Inst.getRegister(), Inst.getOffset(), in emitCFIInstruction()
249 OutStreamer->emitCFIOffset(Inst.getRegister(), Inst.getOffset()); in emitCFIInstruction()
252 OutStreamer->emitCFIRegister(Inst.getRegister(), Inst.getRegister2()); in emitCFIInstruction()
261 OutStreamer->emitCFISameValue(Inst.getRegister()); in emitCFIInstruction()
271 OutStreamer->emitCFIRestore(Inst.getRegister()); in emitCFIInstruction()
274 OutStreamer->emitCFIUndefined(Inst.getRegister()); in emitCFIInstruction()
/llvm-project-15.0.7/libunwind/src/
H A DUnwindCursor.hpp632 _msContext.R0 = r.getRegister(UNW_ARM_R0); in UnwindCursor()
633 _msContext.R1 = r.getRegister(UNW_ARM_R1); in UnwindCursor()
634 _msContext.R2 = r.getRegister(UNW_ARM_R2); in UnwindCursor()
635 _msContext.R3 = r.getRegister(UNW_ARM_R3); in UnwindCursor()
636 _msContext.R4 = r.getRegister(UNW_ARM_R4); in UnwindCursor()
637 _msContext.R5 = r.getRegister(UNW_ARM_R5); in UnwindCursor()
638 _msContext.R6 = r.getRegister(UNW_ARM_R6); in UnwindCursor()
639 _msContext.R7 = r.getRegister(UNW_ARM_R7); in UnwindCursor()
1316 return _registers.getRegister(regNum); in getReg()
2219 registers.getRegister(2) + in getInfoFromTBTable()
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H A DDwarfInstructions.hpp67 return (pint_t)((sint_t)registers.getRegister((int)prolog.cfaRegister) + in getCFA()
95 return (pint_t)addressSpace.getRegister(cfa + (pint_t)savedReg.value); in getSavedRegister()
102 return (pint_t)addressSpace.getRegister(evaluateExpression( in getSavedRegister()
110 return registers.getRegister((int)savedReg.value); in getSavedRegister()
245 returnAddress = registers.getRegister(cieInfo.returnAddressRegister); in stepWithDwarf()
318 pint_t sp = newRegisters.getRegister(UNW_REG_SP); in stepWithDwarf()
778 *(++sp) = registers.getRegister((int)reg); in evaluateExpression()
785 *(++sp) = registers.getRegister((int)reg); in evaluateExpression()
824 svalue += static_cast<sint_t>(registers.getRegister((int)reg)); in evaluateExpression()
833 svalue += static_cast<sint_t>(registers.getRegister((int)reg)); in evaluateExpression()
H A DRegisters.hpp63 uint32_t getRegister(int num) const;
281 uint64_t getRegister(int num) const;
600 uint32_t getRegister(int num) const;
1170 uint64_t getRegister(int num) const;
1819 uint64_t getRegister(int num) const;
2108 uint32_t getRegister(int num) const;
2613 uint32_t getRegister(int num) const;
2812 uint32_t getRegister(int num) const;
3141 uint64_t getRegister(int num) const;
3438 uint32_t getRegister(int num) const;
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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.h627 return ArgInfo.WorkGroupIDX.getRegister();
633 return ArgInfo.WorkGroupIDY.getRegister();
639 return ArgInfo.WorkGroupIDZ.getRegister();
645 return ArgInfo.WorkGroupInfo.getRegister();
665 return ArgInfo.PrivateSegmentWaveByteOffset.getRegister();
753 return Arg ? Arg->getRegister() : MCRegister();
812 return ArgInfo.QueuePtr.getRegister();
816 return ArgInfo.ImplicitBufferPtr.getRegister();
932 return ArgInfo.WorkGroupIDX.getRegister();
935 return ArgInfo.WorkGroupIDY.getRegister();
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H A DSIMachineFunctionInfo.cpp198 AMDGPU::VGPR_32RegClass.getRegister(ST.getMaxNumVGPRs(F) - 1); in SIMachineFunctionInfo()
222 return ArgInfo.PrivateSegmentBuffer.getRegister(); in addPrivateSegmentBuffer()
229 return ArgInfo.DispatchPtr.getRegister(); in addDispatchPtr()
236 return ArgInfo.QueuePtr.getRegister(); in addQueuePtr()
244 return ArgInfo.KernargSegmentPtr.getRegister(); in addKernargSegmentPtr()
251 return ArgInfo.DispatchID.getRegister(); in addDispatchID()
258 return ArgInfo.FlatScratchInit.getRegister(); in addFlatScratchInit()
265 return ArgInfo.ImplicitBufferPtr.getRegister(); in addImplicitBufferPtr()
271 return ArgInfo.LDSKernelId.getRegister(); in addLDSKernelId()
556 OS << printReg(Arg.getRegister(), &TRI); in convertArgumentInfo()
H A DR600InstrInfo.cpp1017 getIndirectAddrRegClass()->getRegister(Address)); in expandPostRAPseudo()
1030 buildMovInstr(MBB, MI, getIndirectAddrRegClass()->getRegister(Address), in expandPostRAPseudo()
1102 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectWrite()
1103 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectWrite()
1104 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectWrite()
1105 case 3: AddrReg = R600::R600_Addr_WRegClass.getRegister(Address); break; in buildIndirectWrite()
1134 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectRead()
1135 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectRead()
1136 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectRead()
1137 case 3: AddrReg = R600::R600_Addr_WRegClass.getRegister(Address); break; in buildIndirectRead()
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H A DR600ISelDAGToDAG.cpp132 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32); in SelectADDRIndirect()
136 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32); in SelectADDRIndirect()
H A DR600ExpandSpecialInstrs.cpp132 R600::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan); in runOnMachineFunction()
232 DstReg = R600::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan); in runOnMachineFunction()
H A DR600EmitClauseMarkers.cpp164 R600::R600_KC0RegClass.getRegister(UsedKCache[j].second)); in SubstituteKCacheBank()
168 R600::R600_KC1RegClass.getRegister(UsedKCache[j].second)); in SubstituteKCacheBank()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp117 Reg = CurDAG->getRegister(ARM::CPSR, MVT::i32); in SelectCMOVPred()
868 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode2OffsetImmPre()
887 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode2OffsetImm()
921 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode3()
937 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode3()
966 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode3Offset()
1085 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode6Offset()
1763 PredReg = CurDAG->getRegister(0, MVT::i32); in tryMVEIndexedLoad()
2160 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLD()
3694 CurDAG->getRegister(0, MVT::i32), in Select()
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/llvm-project-15.0.7/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp457 AArch64MCRegisterClasses[AArch64::FPR8RegClassID].getRegister(RegNo); in DecodeFPR8RegisterClass()
469 AArch64MCRegisterClasses[AArch64::GPR64commonRegClassID].getRegister( in DecodeGPR64commonRegisterClass()
522 .getRegister(RegNo); in DecodeMatrixIndexGPR32_12_15RegisterClass()
558 AArch64MCRegisterClasses[AArch64::ZPRRegClassID].getRegister(RegNo); in DecodeZPRRegisterClass()
585 AArch64MCRegisterClasses[AArch64::ZPR2RegClassID].getRegister(RegNo); in DecodeZPR2RegisterClass()
596 AArch64MCRegisterClasses[AArch64::ZPR3RegClassID].getRegister(RegNo); in DecodeZPR3RegisterClass()
653 AArch64MCRegisterClasses[AArch64::PPRRegClassID].getRegister(RegNo); in DecodePPRRegisterClass()
674 AArch64MCRegisterClasses[AArch64::QQRegClassID].getRegister(RegNo); in DecodeQQRegisterClass()
685 AArch64MCRegisterClasses[AArch64::QQQRegClassID].getRegister(RegNo); in DecodeQQQRegisterClass()
707 AArch64MCRegisterClasses[AArch64::DDRegClassID].getRegister(RegNo); in DecodeDDRegisterClass()
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/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DCFIInstrInserter.cpp196 SetRegister = CFI.getRegister(); in calculateOutgoingCFAInfo()
205 SetRegister = CFI.getRegister(); in calculateOutgoingCFAInfo()
218 CSRRestored.set(CFI.getRegister()); in calculateOutgoingCFAInfo()
254 auto It = CSRLocMap.find(CFI.getRegister()); in calculateOutgoingCFAInfo()
257 {CFI.getRegister(), CSRSavedLocation(CSRReg, CSROffset)}); in calculateOutgoingCFAInfo()
261 CSRSaved.set(CFI.getRegister()); in calculateOutgoingCFAInfo()
H A DMachineOperand.cpp621 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
637 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
644 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
656 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
663 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
671 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
684 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
702 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
708 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
H A DExecutionDomainFix.cpp248 LLVM_DEBUG(dbgs() << printReg(RC->getRegister(rx), TRI) << ":\t" << *MI); in processDefs()
340 const int Def = RDA->getReachingDef(mi, RC->getRegister(rx)); in visitSoftInstr()
342 return RDA->getReachingDef(mi, RC->getRegister(I)) <= Def; in visitSoftInstr()
446 for (MCRegAliasIterator AI(RC->getRegister(i), TRI, true); AI.isValid(); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/Mips/
H A DRegisterAliasingTest.cpp66 ASSERT_THAT(&Cache.getRegister(Mips::T0), &Cache.getRegister(Mips::T0)); in TEST_F()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/X86/
H A DRegisterAliasingTest.cpp65 ASSERT_THAT(&Cache.getRegister(X86::AX), &Cache.getRegister(X86::AX)); in TEST_F()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp70 return CurDAG->getRegister(GlobalBaseReg, in getGlobalBaseReg()
140 R2 = CurDAG->getRegister(SP::G0, TLI->getPointerTy(CurDAG->getDataLayout())); in SelectADDRrr()
234 PairedReg = CurDAG->getRegister(GPVR, MVT::v2i32); in tryInlineAsm()
281 PairedReg = CurDAG->getRegister(GPVR, MVT::v2i32); in tryInlineAsm()
356 TopPart = CurDAG->getRegister(SP::G0, MVT::i32); in Select()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp586 getXRegFromWReg(*MRI.getLLVMRegNum(Inst.getRegister(), true)); in generateCompactUnwindEncoding()
609 unsigned LRReg = *MRI.getLLVMRegNum(LRPush.getRegister(), true); in generateCompactUnwindEncoding()
610 unsigned FPReg = *MRI.getLLVMRegNum(FPPush.getRegister(), true); in generateCompactUnwindEncoding()
632 unsigned Reg1 = *MRI.getLLVMRegNum(Inst.getRegister(), true); in generateCompactUnwindEncoding()
643 unsigned Reg2 = *MRI.getLLVMRegNum(Inst2.getRegister(), true); in generateCompactUnwindEncoding()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp80 return Mips::MSACtrlRegClass.getRegister(RegNum); in getMSACtrlReg()
254 SDValue Zero = CurDAG->getRegister(Mips::ZERO, MVT::i32); in selectAddE()
820 CurDAG->getRegister(Mips::ZERO_64, MVT::i64), in trySelect()
1063 CurDAG->getRegister(Mips::HWR29, MVT::i32), in trySelect()
1148 SDValue ZeroVal = CurDAG->getRegister( in trySelect()
1172 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1195 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1251 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1308 SDValue Zero64Val = CurDAG->getRegister(Mips::ZERO_64, MVT::i64); in trySelect()
/llvm-project-15.0.7/bolt/lib/Core/
H A DBinaryEmitter.cpp824 Streamer.emitCFIDefCfa(Inst.getRegister(), Inst.getOffset()); in emitCFIInstruction()
827 Streamer.emitCFIDefCfaRegister(Inst.getRegister()); in emitCFIInstruction()
830 Streamer.emitCFIOffset(Inst.getRegister(), Inst.getOffset()); in emitCFIInstruction()
833 Streamer.emitCFIRegister(Inst.getRegister(), Inst.getRegister2()); in emitCFIInstruction()
842 Streamer.emitCFISameValue(Inst.getRegister()); in emitCFIInstruction()
852 Streamer.emitCFIRestore(Inst.getRegister()); in emitCFIInstruction()
855 Streamer.emitCFIUndefined(Inst.getRegister()); in emitCFIInstruction()
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DRegisterAliasing.h91 const RegisterAliasingTracker &getRegister(MCPhysReg Reg) const;
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp81 ReplaceNode(N, CurDAG->getRegister(GP, N->getValueType(0)).getNode()); in Select()
200 PairedReg = CurDAG->getRegister(GPVR, MVT::i64); in selectInlineAsm()
235 PairedReg = CurDAG->getRegister(GPVR, MVT::i64); in selectInlineAsm()
/llvm-project-15.0.7/bolt/lib/Passes/
H A DRegReAssign.cpp85 nullptr, CFI->getRegister(), in swap()
92 nullptr, CFI->getRegister(), in swap()
109 CFIReg = CFI->getRegister(); in swap()

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