Searched refs:getRATC (Results 1 – 9 of 9) sorted by relevance
48 &Instr, State.getRATC().emptyRegisters()); in checkAndGetCodeTemplates()149 auto AllRegisters = State.getRATC().emptyRegisters(); in TEST_F()208 &Instr, Configs, State.getRATC().emptyRegisters()); in TEST_F()339 State.getRATC().emptyRegisters()); in TEST_F()355 auto AllRegisters = State.getRATC().emptyRegisters(); in TEST_F()417 &Instr, Benchmarks, State.getRATC().emptyRegisters()); in TEST_F()
145 EXPECT_TRUE(State.getRATC().reservedRegisters().test(X86::AH)); in TEST_F()
41 &Instr, State.getRATC().emptyRegisters()); in checkAndGetCodeTemplates()90 auto AllRegisters = State.getRATC().emptyRegisters(); in TEST_F()
45 return State.getRATC().emptyRegisters(); in getReservedRegs()107 return State.getRATC().getRegister(LoopCounter).aliasedBits(); in getReservedRegs()
44 BitVector ForbiddenRegs = State.getRATC().reservedRegisters(); in generateConfigurations()56 State.getRATC().getRegister(ScratchSpacePointerInReg).aliasedBits(); in generateConfigurations()106 BitVector DefinedRegs = State.getRATC().emptyRegisters(); in computeRegisterInitialValues()
63 const RegisterAliasingTrackerCache &getRATC() const { return *RATC; } in getRATC() function
47 IC.reset(new InstructionsCache(getInstrInfo(), getRATC())); in LLVMState()
41 &Instr, State.getRATC().emptyRegisters()); in checkAndGetCodeTemplates()
342 State.getRATC().getRegister(BaseReg).aliasedBits(); in generateCodeTemplates()401 State.getRATC().getRegister(BaseReg).aliasedBits()); in generateCodeTemplates()403 State.getRATC().getRegister(IndexReg).aliasedBits()); in generateCodeTemplates()