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Searched refs:getNumMicroOps (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/llvm/lib/MCA/Stages/
H A DDispatchStage.cpp63 const unsigned NumMicroOps = IR.getInstruction()->getNumMicroOps(); in checkRCU()
81 const unsigned NumMicroOps = IS.getNumMicroOps(); in dispatch()
160 unsigned NumMicroOps = Inst.getNumMicroOps(); in isAvailable()
H A DExecuteStage.cpp60 NumIssuedOpcodes += IS.getNumMicroOps(); in issueInstruction()
203 unsigned NumMicroOps = Inst.getNumMicroOps(); in execute()
H A DInOrderIssueStage.cpp65 unsigned NumMicroOps = Inst.getNumMicroOps(); in isAvailable()
230 unsigned NumMicroOps = IS.getNumMicroOps(); in tryIssue()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTargetSchedule.cpp106 unsigned TargetSchedModel::getNumMicroOps(const MachineInstr *MI, in getNumMicroOps() function in TargetSchedModel
109 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps()
110 return (UOps >= 0) ? UOps : TII->getNumMicroOps(&InstrItins, *MI); in getNumMicroOps()
H A DVLIWMachineScheduler.cpp365 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard()
432 IssueCount += SchedModel->getNumMicroOps(SU->getInstr()); in bumpNode()
H A DMachineScheduler.cpp2026 RemIssueCount += SchedModel->getNumMicroOps(SU.getInstr(), SC) in init()
2170 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard()
2173 << SchedModel->getNumMicroOps(SU->getInstr()) << '\n'); in checkHazard()
2392 unsigned IncMOps = SchedModel->getNumMicroOps(SU->getInstr()); in bumpNode()
H A DTargetInstrInfo.cpp1119 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() function in TargetInstrInfo
/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/
H A DRetireControlUnit.cpp45 unsigned Entries = normalizeQuantity(Inst.getNumMicroOps()); in dispatch()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetSchedule.h108 unsigned getNumMicroOps(const MachineInstr *MI,
H A DTargetInstrInfo.h1589 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCInstrItineraries.h228 int getNumMicroOps(unsigned ItinClassIndx) const { in getNumMicroOps() function
/llvm-project-15.0.7/llvm/include/llvm/MCA/
H A DInstruction.h542 unsigned getNumMicroOps() const { return Desc.NumMicroOps; } in getNumMicroOps() function
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h315 unsigned getNumMicroOps(const InstrItineraryData *ItinData,
H A DARMBaseInstrInfo.cpp3455 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt()
3752 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() function in ARMBaseInstrInfo
3759 int ItinUOps = ItinData->getNumMicroOps(Class); in getNumMicroOps()
4764 if (!ItinData->isEmpty() && ItinData->getNumMicroOps(Class) < 0) in getInstrLatency()
4765 return getNumMicroOps(ItinData, MI); in getInstrLatency()