| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86EvexToVex.cpp | 163 MachineOperand &Imm = MI.getOperand(MI.getNumExplicitOperands()-1); in performCustomAdjustments()
178 MachineOperand &Imm = MI.getOperand(MI.getNumExplicitOperands()-1); in performCustomAdjustments()
200 const MachineOperand &Imm = MI.getOperand(MI.getNumExplicitOperands()-1); in performCustomAdjustments()
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| H A D | X86FixupBWInsts.cpp | 321 assert(MI->getNumExplicitOperands() == 2); in tryReplaceCopy()
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| /llvm-project-15.0.7/llvm/tools/llvm-reduce/deltas/ |
| H A D | ReduceRegisterUses.cpp | 30 int NumRequiredOps = MI.getNumExplicitOperands() + in removeUsesFromFunction()
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| H A D | ReduceRegisterDefs.cpp | 41 int NumRequiredOps = MI.getNumExplicitOperands() + in removeDefsFromFunction()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 583 return getNumOperands() - getNumExplicitOperands();
601 unsigned getNumExplicitOperands() const;
624 operands_begin() + getNumExplicitOperands());
628 operands_begin() + getNumExplicitOperands());
673 operands_begin() + getNumExplicitOperands());
677 operands_begin() + getNumExplicitOperands());
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVPreLegalizer.cpp | 276 MI.getNumExplicitOperands() - MI.getNumExplicitDefs(); in generateAssignInstrs()
461 unsigned NumOp = MI.getNumExplicitOperands(); in processSwitches()
471 for (unsigned i = MI.getNumExplicitOperands() - 1; i > 1; i--) in processSwitches()
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| H A D | SPIRVInstructionSelector.cpp | 229 if (I.getNumOperands() != I.getNumExplicitOperands()) { in select()
816 for (unsigned i = I.getNumExplicitDefs(); i < I.getNumExplicitOperands(); ++i) in selectConstVector()
1142 for (unsigned i = 4; i < I.getNumExplicitOperands(); ++i) in selectGEP()
1176 MachineInstr *Init = I.getNumExplicitOperands() > 2 in selectIntrinsic()
1184 bool IsNull = I.getNumExplicitDefs() + 1 == I.getNumExplicitOperands(); in selectIntrinsic()
1193 i < I.getNumExplicitOperands(); ++i) { in selectIntrinsic()
1203 i < I.getNumExplicitOperands(); ++i) { in selectIntrinsic()
1210 for (unsigned i = 1; i < I.getNumExplicitOperands(); ++i) { in selectIntrinsic()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFixIrreducibleControlFlow.cpp | 381 unsigned Index = MIB.getInstr()->getNumExplicitOperands() - 1; in makeSingleEntryLoop()
479 ->getOperand(MIB.getInstr()->getNumExplicitOperands() - 1) in makeSingleEntryLoop()
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| H A D | WebAssemblyFixBrTableDefaults.cpp | 133 MI.removeOperand(MI.getNumExplicitOperands() - 1); in fixBrTableDefault()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/Utils/ |
| H A D | WebAssemblyUtilities.cpp | 119 return MI.getOperand(MI.getNumExplicitOperands() - 1); in getCalleeOp()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 370 DefExplicitOpNum = DefMBBI->getNumExplicitOperands(); in copyPhysReg()
1003 int NumOp = MI.getNumExplicitOperands(); in getBranchDestBlock()
1171 if (LdSt.getNumExplicitOperands() != 3) in getMemOperandWithOffsetWidth()
1434 unsigned NumOperands = MI.getNumExplicitOperands(); in createMIROperandComment()
1508 if ((MI.getOperand(MI.getNumExplicitOperands() - 1).getImm() & 1) == 0) in findCommutedOpIndices()
1528 if ((MI.getOperand(MI.getNumExplicitOperands() - 1).getImm() & 1) == 0) in findCommutedOpIndices()
1772 MI.getNumExplicitOperands() == 6); in convertToThreeAddress()
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| H A D | RISCVMCInstLower.cpp | 152 unsigned NumOps = MI->getNumExplicitOperands(); in lowerRISCVVMachineInstrToMCInst()
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| H A D | RISCVExpandPseudoInsts.cpp | 244 assert(MBBI->getNumExplicitOperands() == 3 && MBBI->getNumOperands() >= 5 && in expandVSetVL()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZElimCompare.cpp | 438 FirstOpNum = CCUserMI->getNumExplicitOperands() - 2; in adjustCCMasksForInstr()
510 return Compare.getNumExplicitOperands() == 2 && in isCompareZero()
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| H A D | SystemZInstrInfo.cpp | 525 if (MI.getNumExplicitOperands() == 2 && MI.getOperand(0).isReg() && in analyzeCompare()
1194 unsigned NumOps = MI.getNumExplicitOperands(); in foldMemoryOperandImpl()
1906 0 : CCUsers[Idx]->getNumExplicitOperands() - 2); in prepareCompareSwapOperands()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMFixCortexA57AES1742098Pass.cpp | 288 assert(MI.getNumExplicitOperands() == 3 && MI.getNumExplicitDefs() == 1 && in analyzeMF()
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| H A D | ARMSLSHardening.cpp | 311 for (unsigned OpIdx = BL->getNumExplicitOperands(); in ConvertIndirectCallToIndirectJump()
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| H A D | A15SDOptimizer.cpp | 293 for (unsigned I = 1; I < MI->getNumExplicitOperands(); ++I) { in optimizeSDPattern()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SLSHardening.cpp | 349 for (unsigned OpIdx = BL->getNumExplicitOperands(); in ConvertBLRToBL()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIWholeQuadMode.cpp | 1448 assert(MI->getNumExplicitOperands() == 2); in lowerCopyInstrs()
1488 assert(MI->getNumExplicitOperands() == 3); in lowerCopyInstrs()
1496 assert(MI->getNumExplicitOperands() == 2); in lowerCopyInstrs()
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| H A D | SIShrinkInstructions.cpp | 685 MIB->removeOperand(MIB->getNumExplicitOperands()); in matchSwap()
698 unsigned OpNo = MovT.getNumExplicitOperands() + I; in matchSwap()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCBranchCoalescing.cpp | 263 if (I.getNumOperands() != I.getNumExplicitOperands()) { in canCoalesceBranch()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYConstantIslandPass.cpp | 1319 BMI->getOperand(BMI->getNumExplicitOperands() - 1).setMBB(DestBB); in fixupConditionalBr()
1320 MI->getOperand(MI->getNumExplicitOperands() - 1).setMBB(NewDest); in fixupConditionalBr()
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| H A D | CSKYInstrInfo.cpp | 149 int NumOp = MI.getNumExplicitOperands(); in getBranchDestBlock()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.cpp | 621 if (OperandNo == MI->getNumExplicitOperands() - 1) in isPCRelRegisterOperandLegal()
|