Searched refs:getMI (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/llvm/unittests/MI/ |
| H A D | LiveIntervalTest.cpp | 123 MachineInstr &FromInstr = getMI(MF, From, BlockNum); in testHandleMove() 124 MachineInstr &ToInstr = getMI(MF, To, BlockNum); in testHandleMove() 139 MachineInstr &FromInstr = getMI(MF, From, BlockNum); in testHandleMoveIntoNewBundle() 140 MachineInstr &ToInstr = getMI(MF, To, BlockNum); in testHandleMoveIntoNewBundle() 410 MachineInstr &MI = getMI(MF, 3, /*BlockNum=*/1); in TEST() 487 MachineInstr &UndefSubregDef = getMI(MF, 2, 1); in TEST() 508 MachineInstr &UndefSubregDef = getMI(MF, 2, 1); in TEST() 528 MachineInstr &MI = getMI(MF, 3, /*BlockNum=*/1); in TEST() 672 MachineInstr &Instr1 = getMI(MF, 1, 0); in TEST() 673 MachineInstr &Instr2 = getMI(MF, 2, 0); in TEST() [all …]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | RegisterBankInfo.cpp | 436 MachineInstr &MI = OpdMapper.getMI(); in applyDefaultMapping() 762 OS << "Mapping for " << getMI() << "\nwith " << getInstrMapping() << '\n'; in print() 782 getMI().getParent() && getMI().getMF() in print() 783 ? getMI().getMF()->getSubtarget().getRegisterInfo() in print() 792 OS << '(' << printReg(getMI().getOperand(Idx).getReg(), TRI) << ", ["; in print()
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| H A D | PeepholeOptimizer.cpp | 275 MachineInstr *getMI() const { return MI; } in getMI() function in __anon4a9001390111::RecurrenceInstr 1593 LLVM_DEBUG(dbgs() << "\tInst: " << *(RI.getMI())); in optimizeRecurrence() 1597 TII->commuteInstruction(*(RI.getMI()), false, (*CP).first, in optimizeRecurrence() 1599 LLVM_DEBUG(dbgs() << "\t\tCommuted: " << *(RI.getMI())); in optimizeRecurrence()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBankInfo.h | 328 MachineInstr &getMI() const { return MI; } in getMI() function
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterBankInfo.cpp | 728 MachineInstr &MI = OpdMapper.getMI(); in applyMappingImpl()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 389 switch (OpdMapper.getMI().getOpcode()) { in applyMappingImpl()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1334 MachineInstr &MI = OpdMapper.getMI(); in applyMappingSBufferLoad() 1453 MachineInstr &MI = OpdMapper.getMI(); in applyMappingBFE() 1560 MachineInstr &MI = OpdMapper.getMI(); in applyMappingMAD_64_32() 1755 OpdMapper.getMI().getOperand(OpIdx).setReg(SrcReg[0]); in substituteSimpleCopyRegs() 2114 MachineInstr &MI = OpdMapper.getMI(); in applyMappingImpl()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | GVN.cpp | 204 static AvailableValue getMI(MemIntrinsic *MI, unsigned Offset = 0) { in getMI() function 1210 Res = AvailableValue::getMI(DepMI, Offset); in AnalyzeLoadAvailability()
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