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Searched refs:getID (Results 1 – 25 of 209) sorted by relevance

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/llvm-project-15.0.7/clang-tools-extra/clangd/unittests/
H A DHeadersTests.cpp71 IncludeStructure::HeaderID getID(StringRef Filename, in getID() function in clang::clangd::__anon8a17411c0111::HeadersTest
168 EXPECT_THAT(Includes.includeDepth(getID(MainFile, Includes)), in TEST_F()
187 EXPECT_THAT(Includes.includeDepth(getID(MainFile, Includes)), in TEST_F()
192 EXPECT_THAT(Includes.includeDepth(getID(BarHeader, Includes)), in TEST_F()
241 Expected = {{getID(MainFile, Includes), in TEST_F()
242 {getID(BarHeader, Includes), getID(FooHeader, Includes)}}, in TEST_F()
243 {getID(FooHeader, Includes), in TEST_F()
244 {getID(BarHeader, Includes), getID(BazHeader, Includes)}}}; in TEST_F()
418 EXPECT_TRUE(Includes.isSelfContained(getID("recursive.h", Includes))); in TEST_F()
445 EXPECT_TRUE(Includes.hasIWYUExport(getID("export.h", Includes))); in TEST_F()
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DResourcePriorityQueue.cpp329 && TLI->getRegClassFor(VT)->getID() == RCId) in rawRegPressureDelta()
340 && TLI->getRegClassFor(VT)->getID() == RCId) in rawRegPressureDelta()
364 if ((RegPressure[RC->getID()] + in regPressureDelta()
365 rawRegPressureDelta(SU, RC->getID()) > 0) && in regPressureDelta()
366 (RegPressure[RC->getID()] + in regPressureDelta()
367 rawRegPressureDelta(SU, RC->getID()) >= RegLimit[RC->getID()])) in regPressureDelta()
479 RegPressure[RC->getID()] += numberRCValSuccInSU(SU, RC->getID()); in scheduledNode()
490 if (RegPressure[RC->getID()] > in scheduledNode()
491 (numberRCValPredInSU(SU, RC->getID()))) in scheduledNode()
492 RegPressure[RC->getID()] -= numberRCValPredInSU(SU, RC->getID()); in scheduledNode()
[all …]
/llvm-project-15.0.7/clang/lib/Frontend/
H A DTextDiagnosticPrinter.cpp58 if (Info.getID() == diag::fatal_too_many_errors) { in printDiagnosticOptions()
73 DiagnosticIDs::isBuiltinWarningOrExtension(Info.getID()) && in printDiagnosticOptions()
74 !DiagnosticIDs::isDefaultMappingAsError(Info.getID())) { in printDiagnosticOptions()
79 StringRef Opt = DiagnosticIDs::getWarningOptionForDiag(Info.getID()); in printDiagnosticOptions()
93 DiagnosticIDs::getCategoryNumberForDiag(Info.getID()); in printDiagnosticOptions()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DRegisterBank.cpp63 return ContainedRegClasses.test(RC.getID()); in covers()
76 assert((OtherRB.getID() != getID() || &OtherRB == this) && in operator ==()
92 OS << "(ID:" << getID() << ", Size:" << getSize() << ")\n" in print()
H A DVLIWMachineScheduler.cpp608 << ((Q.getID() == TopQID) ? "(top|" : "(bot|")); in SchedulingCost()
617 if (Q.getID() == TopQID) { in SchedulingCost()
660 if (Q.getID() == TopQID) { in SchedulingCost()
696 if (IsAvailableAmt && pressureChange(SU, Q.getID() != TopQID) > 0 && in SchedulingCost()
709 if (Q.getID() == TopQID && getWeakLeft(SU, true) == 0) { in SchedulingCost()
718 } else if (Q.getID() == BotQID && getWeakLeft(SU, false) == 0) { in SchedulingCost()
735 if (Q.getID() == TopQID) { in SchedulingCost()
803 if ((Q.getID() == TopQID && (*I)->NodeNum < Candidate.SU->NodeNum) || in pickNodeFromQueue()
825 unsigned CurrWeak = getWeakLeft(*I, (Q.getID() == TopQID)); in pickNodeFromQueue()
826 unsigned CandWeak = getWeakLeft(Candidate.SU, (Q.getID() == TopQID)); in pickNodeFromQueue()
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/llvm-project-15.0.7/clang/test/Analysis/engine/
H A Dreplay-without-inlining.c27 static void getID(IB *st, char str[4]) { in getID() function
34 getID (st, header->I); in getH()
44 getID(st, header.I); in readILBM()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp193 assert((RegBank->getID() == ARM::GPRRegBankID || in guessRegClass()
194 RegBank->getID() == ARM::FPRRegBankID) && in guessRegClass()
197 if (RegBank->getID() == ARM::FPRRegBankID) { in guessRegClass()
518 if (RBI.getRegBank(Reg, MRI, TRI)->getID() != ExpectedRegBankID) { in validReg()
922 if (SrcRegBank.getID() == ARM::FPRRegBankID) { in select()
927 assert(DstRegBank.getID() == ARM::GPRRegBankID && in select()
947 if (SrcRegBank.getID() != DstRegBank.getID()) { in select()
953 if (SrcRegBank.getID() != ARM::GPRRegBankID) { in select()
1017 if (SrcRegBank.getID() != DstRegBank.getID()) { in select()
1024 if (SrcRegBank.getID() != ARM::GPRRegBankID) { in select()
[all …]
/llvm-project-15.0.7/clang/tools/libclang/
H A DCXStoredDiagnostic.cpp53 unsigned ID = Diag.getID(); in getDiagnosticOption()
71 return DiagnosticIDs::getCategoryNumberForDiag(Diag.getID()); in getCategory()
75 unsigned catID = DiagnosticIDs::getCategoryNumberForDiag(Diag.getID()); in getCategoryText()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp92 switch (RC->getID()) { in getCallerSavedRegs()
357 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
359 bool SmallSrc = SrcRC->getID() == Hexagon::HvxVRRegClass.getID(); in shouldCoalesce()
360 bool SmallDst = DstRC->getID() == Hexagon::HvxVRRegClass.getID(); in shouldCoalesce()
428 switch (RC.getID()) { in getHexagonSubRegIndex()
H A DHexagonMachineScheduler.cpp58 if (Q.getID() == TopQID && in SchedulingCost()
62 } else if (Q.getID() == BotQID && in SchedulingCost()
/llvm-project-15.0.7/llvm/include/llvm/Option/
H A DOptSpecifier.h29 unsigned getID() const { return ID; } in getID() function
31 bool operator==(OptSpecifier Opt) const { return ID == Opt.getID(); }
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.cpp519 unsigned PredID = Pred->getID(); in addPred()
523 if (PredID == P->getID()) in addPred()
531 return PredID == S.first->getID(); in addPred()
538 unsigned SuccID = Succ->getID(); in addSucc()
542 if (SuccID == S.first->getID()) { in addSucc()
1273 if (!--TopDownBlock2Index[Pred->getID()]) in topologicalSort()
1274 WorkList.push_back(Pred->getID()); in topologicalSort()
1463 assert(Block->getID() == i); in SIScheduleBlockScheduler()
1522 dbgs() << ' ' << Block->getID(); in SIScheduleBlockScheduler()
1589 << Block->getID() << ' '; in pickBlock()
[all …]
/llvm-project-15.0.7/llvm/lib/Option/
H A DOption.cpp100 if (getID() == Opt.getID()) in matches()
246 if (getID() == UnaliasedOption.getID()) in accept()
/llvm-project-15.0.7/clang-tools-extra/clang-tidy/readability/
H A DElseAfterReturnCheck.cpp55 if (DeclRef->getDecl()->getID() == DeclIdentifier) in findUsage()
72 if (llvm::is_contained(DeclIdentifiers, DeclRef->getDecl()->getID())) in findUsageRange()
91 return findUsage(If->getElse(), InitDecl->getID()); in checkInitDeclUsageInElse()
96 DeclIdentifiers.push_back(ChildDecl->getID()); in checkInitDeclUsageInElse()
103 return findUsage(If->getElse(), CondVar->getID()); in checkConditionVarUsageInElse()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp171 if (RB.getID() == X86::GPRRegBankID) { in getRegClass()
181 if (RB.getID() == X86::VECRRegBankID) { in getRegClass()
407 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
410 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
413 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
415 if (X86::VECRRegBankID == RB.getID()) in getLoadStoreOp()
423 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
425 if (X86::VECRRegBankID == RB.getID()) in getLoadStoreOp()
724 if (DstRB.getID() != SrcRB.getID()) { in selectTruncOrPtrToInt()
742 if (DstRB.getID() != X86::GPRRegBankID) in selectTruncOrPtrToInt()
[all …]
/llvm-project-15.0.7/lld/MachO/
H A DDriver.cpp72 switch (outputArg->getOption().getID()) { in getOutputType()
229 switch (arg->getOption().getID()) { in getLTOCachePolicy()
624 assert(arg->getOption().getID() == OPT_platform_version); in parsePlatformVersion()
787 if (opt.getGroup().getID() == OPT_grp_deprecated) { in warnIfDeprecatedOption()
796 switch (opt.getGroup().getID()) { in warnIfUnimplementedOption()
1014 switch (opt.getID()) { in createFiles()
1052 opt.getID() == OPT_weak_l, opt.getID() == OPT_reexport_l, in createFiles()
1053 opt.getID() == OPT_hidden_l, in createFiles()
1061 opt.getID() == OPT_weak_framework, in createFiles()
1414 arg->getOption().getID() == OPT_search_dylibs_first; in link()
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/llvm-project-15.0.7/polly/lib/CodeGen/
H A DIRBuilder.cpp32 static MDNode *getID(LLVMContext &Ctx, Metadata *arg0 = nullptr, in getID() function
63 AliasScopeDomain = getID(Ctx, MDString::get(Ctx, "polly.alias.scope.domain")); in buildAliasScopes()
85 getID(Ctx, AliasScopeDomain, in buildAliasScopes()
/llvm-project-15.0.7/clang/lib/ARCMigrate/
H A DTransProtectedScope.cpp120 if (I->getID() == diag::err_switch_into_protected_scope && in ProtectedScopeFixer()
133 assert(DiagI->getID() == diag::err_switch_into_protected_scope); in handleProtectedScopeError()
159 Pass.TA.clearDiagnostic(Diag.getID(), Diag.getLocation()); in handleProtectedNote()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h72 unsigned getID() const { return MC->getID(); } in getID() function
128 unsigned ID = RC->getID(); in hasSubClassEq()
733 return RCInfos[getNumRegClasses() * HwMode + RC.getID()]; in getRegClassInfo()
1258 bool isValid() const { return getID() != NumRegClasses; } in isValid()
1261 unsigned getID() const { return ID; } in getID() function
H A DStackMaps.h47 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); } in getID() function
101 uint64_t getID() const { return getMetaOper(IDPos).getImm(); } in getID() function
204 uint64_t getID() const { return MI->getOperand(NumDefs + IDPos).getImm(); } in getID() function
H A DRegisterBankInfo.h230 unsigned getID() const { return ID; } in getID() function
254 return getID() != InvalidMappingID && OperandsMapping; in isValid()
717 if (OpdMapper.getInstrMapping().getID() == DefaultMappingID) in applyMapping()
/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DMemorySSA.h221 inline unsigned getID() const;
345 OptimizedID = DMA->getID();
353 return getDefiningAccess() && OptimizedID == getDefiningAccess()->getID();
408 OptimizedID = MA->getID();
416 return getOptimized() && OptimizedID == getOptimized()->getID();
426 unsigned getID() const { return ID; }
646 unsigned getID() const { return ID; }
675 inline unsigned MemoryAccess::getID() const {
679 return MD->getID();
680 return cast<MemoryPhi>(this)->getID();
/llvm-project-15.0.7/clang-tools-extra/clangd/
H A DHeaders.cpp126 *Out->getID(SM.getFileEntryForID(PrevFID))); in FileChanged()
129 *Out->getID(SM.getFileEntryForID(PrevFID))); in FileChanged()
174 *Out->getID(SM.getFileEntryForID(SM.getFileID(Range.getBegin())))); in HandleComment()
250 IncludeStructure::getID(const FileEntry *Entry) const { in getID() function in clang::clangd::IncludeStructure
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVInstrInfo.cpp53 return DefRegClass && DefRegClass->getID() == SPIRV::TYPERegClass.getID(); in isTypeDeclInstr()
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Ddebug-info-dup-fwd-decl.cpp9 getID() const in getID() function in Test

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