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/llvm-project-15.0.7/clang/test/CodeGen/
H A D2008-08-07-AlignPadding1.c21 #define GEN_HEAD(n) (&generations[n].head)
27 struct gc_generation generations[3] = { variable
H A Dunion-init.c23 #define GEN_HEAD(n) (&generations[n].head)
26 struct gc_generation generations[NUM_GENERATIONS] = { variable
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dbranch-relaxation-inst-size-gfx10.ll6 ; instruction, rather than 8 in previous generations.
/llvm-project-15.0.7/llvm/docs/HistoricalNotes/
H A D2001-04-16-DynamicCompilation.txt38 body of legacy code that was compiled for previous generations and will
H A D2001-02-09-AdveComments.txt46 255 positions seems adequate for several generations of machines
H A D2001-02-09-AdveCommentsResponse.txt80 > 255 positions seems adequate for several generations of machines
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonIntrinsics.td242 // Patterns for optimizing code generations for HVX.
/llvm-project-15.0.7/llvm/docs/tutorial/
H A DBuildingAJIT1.rst53 Finally, a word on API generations: ORC is the 3rd generation of LLVM JIT API.
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td214 // Encoding changes between subtarget generations.
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Linalg/IR/
H A DLinalgNamedStructuredOps.yaml3617 The operation generations pseudo random numbers using a linear congruential