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/llvm-project-15.0.7/llvm/docs/CommandGuide/
H A Dtblgen.rst259 .. option:: -gen-arm-neon
263 .. option:: -gen-arm-fp16
267 .. option:: -gen-arm-bf16
359 .. option:: -gen-opt-docs
416 .. option:: -gen-attrs
432 .. option:: -gen-ctags
456 .. option:: -gen-directive-gen
468 .. option:: -gen-emitter
546 .. option:: -gen-opt-rst
661 .. option:: -gen-op-defs
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Dialect/LLVMIR/
H A DCMakeLists.txt4 mlir_tablegen(LLVMOpsAttrDefs.h.inc -gen-attrdef-decls)
5 mlir_tablegen(LLVMOpsAttrDefs.cpp.inc -gen-attrdef-defs)
9 mlir_tablegen(LLVMOps.h.inc -gen-op-decls)
10 mlir_tablegen(LLVMOps.cpp.inc -gen-op-defs)
11 mlir_tablegen(LLVMOpsDialect.h.inc -gen-dialect-decls)
13 mlir_tablegen(LLVMOpsEnums.h.inc -gen-enum-decls)
14 mlir_tablegen(LLVMOpsEnums.cpp.inc -gen-enum-defs)
18 mlir_tablegen(LLVMIntrinsicOps.h.inc -gen-op-decls)
19 mlir_tablegen(LLVMIntrinsicOps.cpp.inc -gen-op-defs)
22 add_mlir_doc(LLVMOps LLVMOps Dialects/ -gen-op-doc)
[all …]
/llvm-project-15.0.7/mlir/include/mlir/IR/
H A DCMakeLists.txt6 mlir_tablegen(BuiltinAttributes.h.inc -gen-attrdef-decls)
7 mlir_tablegen(BuiltinAttributes.cpp.inc -gen-attrdef-defs)
16 mlir_tablegen(BuiltinDialect.h.inc -gen-dialect-decls)
17 mlir_tablegen(BuiltinDialect.cpp.inc -gen-dialect-defs)
21 mlir_tablegen(BuiltinLocationAttributes.h.inc -gen-attrdef-decls)
22 mlir_tablegen(BuiltinLocationAttributes.cpp.inc -gen-attrdef-defs)
26 mlir_tablegen(BuiltinOps.h.inc -gen-op-decls)
27 mlir_tablegen(BuiltinOps.cpp.inc -gen-op-defs)
31 mlir_tablegen(BuiltinTypes.h.inc -gen-typedef-decls)
32 mlir_tablegen(BuiltinTypes.cpp.inc -gen-typedef-defs)
[all …]
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DCMakeLists.txt2 tablegen(LLVM Attributes.inc -gen-attrs)
5 tablegen(LLVM IntrinsicImpl.inc -gen-intrinsic-impl)
6 tablegen(LLVM IntrinsicEnums.inc -gen-intrinsic-enums)
8 tablegen(LLVM IntrinsicsAMDGPU.h -gen-intrinsic-enums -intrinsic-prefix=amdgcn)
9 tablegen(LLVM IntrinsicsARM.h -gen-intrinsic-enums -intrinsic-prefix=arm)
10 tablegen(LLVM IntrinsicsBPF.h -gen-intrinsic-enums -intrinsic-prefix=bpf)
11 tablegen(LLVM IntrinsicsDirectX.h -gen-intrinsic-enums -intrinsic-prefix=dx)
13 tablegen(LLVM IntrinsicsMips.h -gen-intrinsic-enums -intrinsic-prefix=mips)
16 tablegen(LLVM IntrinsicsR600.h -gen-intrinsic-enums -intrinsic-prefix=r600)
21 tablegen(LLVM IntrinsicsX86.h -gen-intrinsic-enums -intrinsic-prefix=x86)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Datomics-with-scope.ll14 %tmp36 = tail call i32 @llvm.nvvm.atomic.add.gen.i.cta.i32.p0i32(i32* %ip, i32 %i)
148 declare i32 @llvm.nvvm.atomic.add.gen.i.cta.i32.p0i32(i32* nocapture, i32) #1
149 declare i64 @llvm.nvvm.atomic.add.gen.i.cta.i64.p0i64(i64* nocapture, i64) #1
150 declare i32 @llvm.nvvm.atomic.add.gen.i.sys.i32.p0i32(i32* nocapture, i32) #1
151 declare i64 @llvm.nvvm.atomic.add.gen.i.sys.i64.p0i64(i64* nocapture, i64) #1
160 declare i32 @llvm.nvvm.atomic.max.gen.i.cta.i32.p0i32(i32* nocapture, i32) #1
161 declare i64 @llvm.nvvm.atomic.max.gen.i.cta.i64.p0i64(i64* nocapture, i64) #1
176 declare i32 @llvm.nvvm.atomic.or.gen.i.cta.i32.p0i32(i32* nocapture, i32) #1
177 declare i64 @llvm.nvvm.atomic.or.gen.i.cta.i64.p0i64(i64* nocapture, i64) #1
178 declare i32 @llvm.nvvm.atomic.or.gen.i.sys.i32.p0i32(i32* nocapture, i32) #1
[all …]
/llvm-project-15.0.7/llvm/utils/gn/secondary/clang/include/clang/AST/
H A DBUILD.gn4 args = [ "-gen-clang-attr-classes" ]
9 args = [ "-gen-clang-attr-impl" ]
24 args = [ "-gen-clang-attr-ast-visitor" ]
29 args = [ "-gen-clang-stmt-nodes" ]
34 args = [ "-gen-clang-decl-nodes" ]
39 args = [ "-gen-clang-type-nodes" ]
44 args = [ "-gen-clang-basic-reader" ]
49 args = [ "-gen-clang-basic-writer" ]
54 args = [ "-gen-clang-type-reader" ]
59 args = [ "-gen-clang-type-writer" ]
[all …]
/llvm-project-15.0.7/clang/include/clang/Basic/
H A DCMakeLists.txt3 -gen-clang-diags-defs -clang-component=${component}
20 clang_tablegen(DiagnosticGroups.inc -gen-clang-diag-groups
24 clang_tablegen(DiagnosticIndexName.inc -gen-clang-diags-index-name
28 clang_tablegen(AttrList.inc -gen-clang-attr-list
45 clang_tablegen(arm_neon.inc -gen-arm-neon-sema
48 clang_tablegen(arm_fp16.inc -gen-arm-neon-sema
51 clang_tablegen(arm_mve_builtins.inc -gen-arm-mve-builtin-def
57 clang_tablegen(arm_mve_builtin_sema.inc -gen-arm-mve-builtin-sema
63 clang_tablegen(arm_sve_builtins.inc -gen-arm-sve-builtins
69 clang_tablegen(arm_sve_typeflags.inc -gen-arm-sve-typeflags
[all …]
/llvm-project-15.0.7/llvm/utils/gn/secondary/clang/include/clang/Basic/
H A DBUILD.gn37 "-gen-clang-diags-defs",
54 args = [ "-gen-clang-diag-groups" ]
66 args = [ "-gen-clang-attr-list" ]
83 args = [ "-gen-arm-neon-sema" ]
87 args = [ "-gen-arm-neon-sema" ]
91 args = [ "-gen-arm-mve-builtin-def" ]
101 args = [ "-gen-arm-mve-builtin-sema" ]
111 args = [ "-gen-arm-sve-builtins" ]
121 args = [ "-gen-arm-sve-typeflags" ]
131 args = [ "-gen-arm-cde-builtin-def" ]
[all …]
/llvm-project-15.0.7/clang/include/clang/AST/
H A DCMakeLists.txt1 clang_tablegen(Attrs.inc -gen-clang-attr-classes
5 clang_tablegen(AttrImpl.inc -gen-clang-attr-impl
9 clang_tablegen(AttrTextNodeDump.inc -gen-clang-attr-text-node-dump
13 clang_tablegen(AttrNodeTraverse.inc -gen-clang-attr-node-traverse
17 clang_tablegen(AttrVisitor.inc -gen-clang-attr-ast-visitor
21 clang_tablegen(StmtNodes.inc -gen-clang-stmt-nodes
25 clang_tablegen(DeclNodes.inc -gen-clang-decl-nodes
29 clang_tablegen(TypeNodes.inc -gen-clang-type-nodes
41 clang_tablegen(AbstractTypeReader.inc -gen-clang-type-reader
45 clang_tablegen(AbstractTypeWriter.inc -gen-clang-type-writer
[all …]
/llvm-project-15.0.7/mlir/test/lib/Dialect/Test/
H A DCMakeLists.txt8 mlir_tablegen(TestAttrInterfaces.h.inc -gen-attr-interface-decls)
9 mlir_tablegen(TestAttrInterfaces.cpp.inc -gen-attr-interface-defs)
12 mlir_tablegen(TestOpInterfaces.h.inc -gen-op-interface-decls)
13 mlir_tablegen(TestOpInterfaces.cpp.inc -gen-op-interface-defs)
17 mlir_tablegen(TestAttrDefs.h.inc -gen-attrdef-decls)
18 mlir_tablegen(TestAttrDefs.cpp.inc -gen-attrdef-defs)
27 mlir_tablegen(TestOps.h.inc -gen-op-decls)
28 mlir_tablegen(TestOps.cpp.inc -gen-op-defs)
31 mlir_tablegen(TestOpEnums.h.inc -gen-enum-decls)
32 mlir_tablegen(TestOpEnums.cpp.inc -gen-enum-defs)
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DCMakeLists.txt5 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
8 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
9 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
11 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
12 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
21 tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
22 tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
24 tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank)
26 tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
[all …]
/llvm-project-15.0.7/mlir/tools/mlir-linalg-ods-gen/
H A DCMakeLists.txt6 # New mlir-linalg-ods-yaml-gen.
7 add_mlir_tool(mlir-linalg-ods-yaml-gen
8 mlir-linalg-ods-yaml-gen.cpp
10 llvm_update_compile_flags(mlir-linalg-ods-yaml-gen)
11 target_link_libraries(mlir-linalg-ods-yaml-gen PRIVATE
17 set(MLIR_LINALG_ODS_YAML_GEN mlir-linalg-ods-yaml-gen CACHE
21 set(MLIR_LINALG_ODS_YAML_GEN_TARGET mlir-linalg-ods-yaml-gen PARENT_SCOPE)
24 if (${MLIR_LINALG_ODS_YAML_GEN} STREQUAL "mlir-linalg-ods-yaml-gen")
25 …build_native_tool(mlir-linalg-ods-yaml-gen MLIR_LINALG_ODS_YAML_GEN_EXE DEPENDS mlir-linalg-ods-ya…
29 set(MLIR_LINALG_ODS_YAML_GEN_TARGET mlir-linalg-ods-yaml-gen-host DEPENDS PARENT_SCOPE)
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DCMakeLists.txt5 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
11 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
19 tablegen(LLVM AMDGPUGenGlobalISel.inc -gen-global-isel)
28 tablegen(LLVM R600GenAsmWriter.inc -gen-asm-writer)
30 tablegen(LLVM R600GenDAGISel.inc -gen-dag-isel)
32 tablegen(LLVM R600GenInstrInfo.inc -gen-instr-info)
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/
H A DCMakeLists.txt2 add_mlir_doc(SPIRVOps SPIRVOps Dialects/ -gen-op-doc)
5 mlir_tablegen(SPIRVEnums.h.inc -gen-enum-decls)
6 mlir_tablegen(SPIRVEnums.cpp.inc -gen-enum-defs)
11 mlir_tablegen(SPIRVEnumAvailability.h.inc -gen-spirv-enum-avail-decls)
18 mlir_tablegen(SPIRVAvailability.h.inc -gen-avail-interface-decls)
19 mlir_tablegen(SPIRVAvailability.cpp.inc -gen-avail-interface-defs)
20 mlir_tablegen(SPIRVOpAvailabilityImpl.inc -gen-spirv-avail-impls)
25 mlir_tablegen(SPIRVSerialization.inc -gen-spirv-serialization)
30 mlir_tablegen(SPIRVAttrUtils.inc -gen-spirv-attr-utils)
35 mlir_tablegen(SPIRVAttributes.h.inc -gen-attrdef-decls)
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DCMakeLists.txt5 tablegen(LLVM MipsGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM MipsGenFastISel.inc -gen-fast-isel)
11 tablegen(LLVM MipsGenGlobalISel.inc -gen-global-isel)
14 tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
15 tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter)
17 tablegen(LLVM MipsGenRegisterBank.inc -gen-register-bank)
19 tablegen(LLVM MipsGenSubtargetInfo.inc -gen-subtarget)
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Dialect/OpenMP/
H A DCMakeLists.txt2 mlir_tablegen(OmpCommon.td --gen-directive-decl --directives-dialect=OpenMP)
6 mlir_tablegen(OpenMPOpsDialect.h.inc -gen-dialect-decls -dialect=omp)
7 mlir_tablegen(OpenMPOpsDialect.cpp.inc -gen-dialect-defs -dialect=omp)
8 mlir_tablegen(OpenMPOps.h.inc -gen-op-decls)
9 mlir_tablegen(OpenMPOps.cpp.inc -gen-op-defs)
10 mlir_tablegen(OpenMPOpsEnums.h.inc -gen-enum-decls)
11 mlir_tablegen(OpenMPOpsEnums.cpp.inc -gen-enum-defs)
12 mlir_tablegen(OpenMPOpsAttributes.h.inc -gen-attrdef-decls -attrdefs-dialect=omp)
14 add_mlir_doc(OpenMPOps OpenMPDialect Dialects/ -gen-dialect-doc -dialect=omp)
20 mlir_tablegen(OpenMPTypeInterfaces.h.inc -gen-type-interface-decls)
[all …]
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DCMakeLists.txt5 tablegen(LLVM RISCVGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM RISCVGenAsmWriter.inc -gen-asm-writer)
8 tablegen(LLVM RISCVGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM RISCVGenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM RISCVGenGlobalISel.inc -gen-global-isel)
11 tablegen(LLVM RISCVGenInstrInfo.inc -gen-instr-info)
12 tablegen(LLVM RISCVGenMCCodeEmitter.inc -gen-emitter)
13 tablegen(LLVM RISCVGenMCPseudoLowering.inc -gen-pseudo-lowering)
14 tablegen(LLVM RISCVGenRegisterBank.inc -gen-register-bank)
15 tablegen(LLVM RISCVGenRegisterInfo.inc -gen-register-info)
[all …]
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DCMakeLists.txt5 tablegen(LLVM M68kGenGlobalISel.inc -gen-global-isel)
6 tablegen(LLVM M68kGenRegisterInfo.inc -gen-register-info)
7 tablegen(LLVM M68kGenRegisterBank.inc -gen-register-bank)
8 tablegen(LLVM M68kGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM M68kGenSubtargetInfo.inc -gen-subtarget)
10 tablegen(LLVM M68kGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM M68kGenDAGISel.inc -gen-dag-isel)
13 tablegen(LLVM M68kGenCallingConv.inc -gen-callingconv)
14 tablegen(LLVM M68kGenAsmWriter.inc -gen-asm-writer)
15 tablegen(LLVM M68kGenAsmMatcher.inc -gen-asm-matcher)
[all …]
/llvm-project-15.0.7/clang/test/Modules/
H A Ddependency-gen.modulemap12 header "Inputs/dependency-gen.h"
20 // IMPLICIT-DAG: {{[/\\]}}dependency-gen.modulemap
23 // IMPLICIT-DAG: {{ |\.[/\\]}}Inputs{{[/\\]}}dependency-gen.h
24 // IMPLICIT-DAG: {{ |\.[/\\]}}Inputs{{[/\\]}}dependency-gen-included.h
25 // IMPLICIT-DAG: {{ |\.[/\\]}}Inputs{{[/\\]}}dependency-gen-included2.h
32 // EXPLICIT-NOT: dependency-gen-
33 // EXPLICIT: {{.*[/\\]}}dependency-gen.modulemap
34 // EXPLICIT-NOT: dependency-gen-
36 // EXPLICIT-NOT: dependency-gen-
37 // EXPLICIT: {{ |\.[/\\]}}Inputs{{[/\\]}}dependency-gen.h
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DCMakeLists.txt5 tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM X86GenAsmWriter.inc -gen-asm-writer)
8 tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
9 tablegen(LLVM X86GenDAGISel.inc -gen-dag-isel)
12 tablegen(LLVM X86GenExegesis.inc -gen-exegesis)
13 tablegen(LLVM X86GenFastISel.inc -gen-fast-isel)
14 tablegen(LLVM X86GenGlobalISel.inc -gen-global-isel)
15 tablegen(LLVM X86GenInstrInfo.inc -gen-instr-info
18 tablegen(LLVM X86GenRegisterBank.inc -gen-register-bank)
19 tablegen(LLVM X86GenRegisterInfo.inc -gen-register-info)
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DCMakeLists.txt5 tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
11 tablegen(LLVM ARMGenGlobalISel.inc -gen-global-isel)
12 tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
13 tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
15 tablegen(LLVM ARMGenRegisterBank.inc -gen-register-bank)
16 tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
[all …]
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCMakeLists.txt5 tablegen(LLVM CSKYGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM CSKYGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM CSKYGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM CSKYGenCompressInstEmitter.inc -gen-compress-inst-emitter)
9 tablegen(LLVM CSKYGenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM CSKYGenDisassemblerTables.inc -gen-disassembler)
11 tablegen(LLVM CSKYGenInstrInfo.inc -gen-instr-info)
12 tablegen(LLVM CSKYGenMCCodeEmitter.inc -gen-emitter)
13 tablegen(LLVM CSKYGenMCPseudoLowering.inc -gen-pseudo-lowering)
14 tablegen(LLVM CSKYGenRegisterInfo.inc -gen-register-info)
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Dialect/OpenACC/
H A DCMakeLists.txt2 mlir_tablegen(AccCommon.td --gen-directive-decl --directives-dialect=OpenACC)
6 mlir_tablegen(OpenACCOpsDialect.h.inc -gen-dialect-decls -dialect=acc)
7 mlir_tablegen(OpenACCOpsDialect.cpp.inc -gen-dialect-defs -dialect=acc)
8 mlir_tablegen(OpenACCOps.h.inc -gen-op-decls)
9 mlir_tablegen(OpenACCOps.cpp.inc -gen-op-defs)
10 mlir_tablegen(OpenACCOpsEnums.h.inc -gen-enum-decls)
11 mlir_tablegen(OpenACCOpsEnums.cpp.inc -gen-enum-defs)
12 mlir_tablegen(OpenACCOpsAttributes.h.inc -gen-attrdef-decls -attrdefs-dialect=acc)
13 mlir_tablegen(OpenACCOpsAttributes.cpp.inc -gen-attrdef-defs -attrdefs-dialect=acc)
14 add_mlir_doc(OpenACCOps OpenACCDialect Dialects/ -gen-dialect-doc)
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DCMakeLists.txt5 tablegen(LLVM PPCGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM PPCGenFastISel.inc -gen-fast-isel)
11 tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
12 tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter)
13 tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
14 tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
15 tablegen(LLVM PPCGenExegesis.inc -gen-exegesis)
[all …]
/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/include/llvm/IR/
H A DBUILD.gn5 args = [ "-gen-attrs" ]
24 "-gen-intrinsic-enums",
34 "-gen-intrinsic-enums",
44 "-gen-intrinsic-enums",
54 "-gen-intrinsic-enums",
64 "-gen-intrinsic-enums",
74 "-gen-intrinsic-enums",
84 "-gen-intrinsic-enums",
94 "-gen-intrinsic-enums",
104 "-gen-intrinsic-enums",
[all …]

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