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/llvm-project-15.0.7/llvm/test/MC/LoongArch/Basic/Float/
H A Df-arith.s44 # ASM-AND-OBJ: fmax.s $ft14, $fa6, $fs3
46 fmax.s $ft14, $fa6, $fs3
52 # ASM-AND-OBJ: fmaxa.s $ft1, $fs3, $fs7
54 fmaxa.s $ft1, $fs3, $fs7
68 # ASM-AND-OBJ: fsqrt.s $fs3, $ft10
70 fsqrt.s $fs3, $ft10
72 # ASM-AND-OBJ: frecip.s $ft9, $fs3
74 frecip.s $ft9, $fs3
H A Dd-arith.s37 # ASM-AND-OBJ: fmsub.d $fa6, $ft10, $ft12, $fs3
39 fmsub.d $fa6, $ft10, $ft12, $fs3
53 # ASM-AND-OBJ: fmin.d $fa1, $ft5, $fs3
55 fmin.d $fa1, $ft5, $fs3
77 # ASM-AND-OBJ: frecip.d $fs3, $fs3
79 frecip.d $fs3, $fs3
H A Dd-memory.s25 # ASM-AND-OBJ: fldx.d $fs3, $t1, $s8
27 fldx.d $fs3, $t1, $s8
H A Dd-conv.s89 # ASM-AND-OBJ: ftintrne.l.s $ft14, $fs3
91 ftintrne.l.s $ft14, $fs3
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dcallee-saved-fpr32s.ll51 ; ILP32-NEXT: flw fs3, 92(a1)
68 ; ILP32-NEXT: fsw fs3, 92(a1)
121 ; LP64-NEXT: flw fs3, 92(a1)
138 ; LP64-NEXT: fsw fs3, 92(a1)
204 ; ILP32F-NEXT: flw fs3, 92(a1)
221 ; ILP32F-NEXT: fsw fs3, 92(a1)
300 ; LP64F-NEXT: flw fs3, 92(a1)
317 ; LP64F-NEXT: fsw fs3, 92(a1)
396 ; ILP32D-NEXT: flw fs3, 92(a1)
492 ; LP64D-NEXT: flw fs3, 92(a1)
[all …]
H A Dfastcc-float.ll41 ; CHECK-NEXT: flw fs3, 124(sp)
61 ; CHECK-NEXT: fsw fs3, 12(sp)
H A Dcallee-saved-fpr64s.ll47 ; ILP32-NEXT: fld fs3, 184(a1)
64 ; ILP32-NEXT: fsd fs3, 184(a1)
117 ; LP64-NEXT: fld fs3, 184(a1)
134 ; LP64-NEXT: fsd fs3, 184(a1)
200 ; ILP32D-NEXT: fld fs3, 184(a1)
217 ; ILP32D-NEXT: fsd fs3, 184(a1)
296 ; LP64D-NEXT: fld fs3, 184(a1)
313 ; LP64D-NEXT: fsd fs3, 184(a1)
717 ; ILP32D-NEXT: fld fs3, 216(s1)
860 ; LP64D-NEXT: fld fs3, 216(s1)
[all …]
H A Dinline-asm-f-abi-names.ll834 ; RV32IF-NEXT: fsw fs3, 12(sp) # 4-byte Folded Spill
835 ; RV32IF-NEXT: fmv.s fs3, fa0
837 ; RV32IF-NEXT: fcvt.w.s a0, fs3
846 ; RV64IF-NEXT: fsw fs3, 12(sp) # 4-byte Folded Spill
847 ; RV64IF-NEXT: fmv.s fs3, fa0
849 ; RV64IF-NEXT: fcvt.w.s a0, fs3
863 ; RV32IF-NEXT: fsw fs3, 12(sp) # 4-byte Folded Spill
864 ; RV32IF-NEXT: fmv.s fs3, fa0
866 ; RV32IF-NEXT: fcvt.w.s a0, fs3
876 ; RV64IF-NEXT: fmv.s fs3, fa0
[all …]
H A Dinline-asm-d-abi-names.ll834 ; RV32IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
835 ; RV32IFD-NEXT: fmv.d fs3, fa0
837 ; RV32IFD-NEXT: fcvt.w.d a0, fs3
846 ; RV64IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
847 ; RV64IFD-NEXT: fmv.d fs3, fa0
849 ; RV64IFD-NEXT: fcvt.w.d a0, fs3
863 ; RV32IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
864 ; RV32IFD-NEXT: fmv.d fs3, fa0
866 ; RV32IFD-NEXT: fcvt.w.d a0, fs3
876 ; RV64IFD-NEXT: fmv.d fs3, fa0
[all …]
H A Dghccc-rv32.ll21 @f4 = external global float ; assigned to register: fs3
52 ; CHECK-NEXT: flw fs3, %lo(f4)(a0)
H A Dghccc-rv64.ll21 @f4 = external global float ; assigned to register: fs3
52 ; CHECK-NEXT: flw fs3, %lo(f4)(a0)
H A Dinterrupt-attr.ll135 ; CHECK-RV32-F-NEXT: fsw fs3, 32(sp) # 4-byte Folded Spill
184 ; CHECK-RV32-F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
238 ; CHECK-RV32-FD-NEXT: fsd fs3, 64(sp) # 8-byte Folded Spill
287 ; CHECK-RV32-FD-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
380 ; CHECK-RV64-F-NEXT: fsw fs3, 32(sp) # 4-byte Folded Spill
429 ; CHECK-RV64-F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
483 ; CHECK-RV64-FD-NEXT: fsd fs3, 64(sp) # 8-byte Folded Spill
637 ; CHECK-RV32-F-NEXT: fsw fs3, 44(sp) # 4-byte Folded Spill
688 ; CHECK-RV32-F-NEXT: flw fs3, 44(sp) # 4-byte Folded Reload
743 ; CHECK-RV32-FD-NEXT: fsd fs3, 72(sp) # 8-byte Folded Spill
[all …]
H A Dfpclamptosat_vec.ll907 ; CHECK-NEXT: .cfi_offset fs3, -104
931 ; CHECK-NEXT: fmv.s fs3, fa0
955 ; CHECK-NEXT: fcvt.l.s a3, fs3, rtz
1024 ; CHECK-NEXT: fcvt.l.s a3, fs3, rtz
1110 ; CHECK-NEXT: .cfi_offset fs3, -104
1134 ; CHECK-NEXT: fmv.s fs3, fa0
1269 ; CHECK-NEXT: .cfi_offset fs3, -104
1293 ; CHECK-NEXT: fmv.s fs3, fa0
2981 ; CHECK-NEXT: fmv.s fs3, fa0
3182 ; CHECK-NEXT: fmv.s fs3, fa0
[all …]
H A Dinterrupt-attr-nocall.ll455 ; CHECK-RV32IF-NEXT: fsw fs3, 32(sp) # 4-byte Folded Spill
513 ; CHECK-RV32IF-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
648 ; CHECK-RV32IF-NEXT: fsw fs3, 44(sp) # 4-byte Folded Spill
708 ; CHECK-RV32IF-NEXT: flw fs3, 44(sp) # 4-byte Folded Reload
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Drv32d-valid.s55 # CHECK-ASM-AND-OBJ: fnmsub.d fs2, fs3, fs4, fs5, dyn
89 # CHECK-ASM-AND-OBJ: fmax.d fs2, fs3, fs4
91 fmax.d fs2, fs3, fs4
130 # CHECK-ASM-AND-OBJ: fnmsub.d fs2, fs3, fs4, fs5, rdn
H A Drv32f-valid.s50 # CHECK-ASM-AND-OBJ: fnmsub.s fs2, fs3, fs4, fs5, dyn
84 # CHECK-ASM-AND-OBJ: fmax.s fs2, fs3, fs4
86 fmax.s fs2, fs3, fs4
126 # CHECK-ASM-AND-OBJ: fnmsub.s fs2, fs3, fs4, fs5, rdn
H A Drv32zfh-valid.s50 # CHECK-ASM-AND-OBJ: fnmsub.h fs2, fs3, fs4, fs5, dyn
84 # CHECK-ASM-AND-OBJ: fmax.h fs2, fs3, fs4
86 fmax.h fs2, fs3, fs4
126 # CHECK-ASM-AND-OBJ: fnmsub.h fs2, fs3, fs4, fs5, rdn
H A Drvd-aliases-valid.s67 # CHECK-INST: fnmsub.d fs2, fs3, fs4, fs5, dyn
68 # CHECK-ALIAS: fnmsub.d fs2, fs3, fs4, fs5{{[[:space:]]}}
H A Drvzfh-aliases-valid.s67 # CHECK-INST: fnmsub.h fs2, fs3, fs4, fs5, dyn
68 # CHECK-ALIAS: fnmsub.h fs2, fs3, fs4, fs5{{[[:space:]]}}
H A Drvf-aliases-valid.s130 # CHECK-INST: fnmsub.s fs2, fs3, fs4, fs5, dyn
131 # CHECK-ALIAS: fnmsub.s fs2, fs3, fs4, fs5{{[[:space:]]}}
H A Dnumeric-reg-names-f.s105 fsqrt.s fa0, fs3
H A Dnumeric-reg-names-d.s105 fsqrt.d fa0, fs3
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchRegisterInfo.td130 def F27 : LoongArchReg32<27,"f27", ["fs3"]>, DwarfRegNum<[59]>;
/llvm-project-15.0.7/compiler-rt/lib/asan/tests/
H A Dasan_test.cpp1007 static char fs3[10]; in TEST() local
1036 Ident(fs3); in TEST()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td201 def F19_H : RISCVReg16<19,"f19", ["fs3"]>, DwarfRegNum<[51]>;