Searched refs:fq (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/clang/test/SemaCXX/ |
| H A D | warn-thread-safety-negative.cpp | 99 void fq() EXCLUSIVE_LOCKS_REQUIRED(!::globalMutex); 104 void fq() EXCLUSIVE_LOCKS_REQUIRED(!ns::globalMutex); 109 fq(); // expected-warning {{calling function 'fq' requires negative capability '!globalMutex'}} in testGlobals() 111 ns::fq(); in testGlobals() 116 fq(); in testNamespaceGlobals() 118 …ns::fq(); // expected-warning {{calling function 'fq' requires negative capability '!globalMutex'}} in testNamespaceGlobals()
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| /llvm-project-15.0.7/llvm/test/MC/Sparc/ |
| H A D | sparc-fp-instructions.s | 151 ! CHECK: std %fq, [%o4] ! encoding: [0xc1,0x33,0x00,0x00] 152 ! CHECK: std %fq, [%l1+62] ! encoding: [0xc1,0x34,0x60,0x3e] 153 ! CHECK: std %fq, [%i3+%l7] ! encoding: [0xc1,0x36,0xc0,0x17] 154 std %fq, [%o4] 155 std %fq, [%l1+62] 156 std %fq, [%i3+%l7]
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| H A D | sparc-special-registers.s | 55 ! CHECK: std %fq, [%g6+%i2] ! encoding: [0xc1,0x31,0x80,0x1a] 56 std %fq, [%g6 + %i2]
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Sparc/ |
| H A D | sparc-special-registers.txt | 45 # CHECK: std %fq, [%i5+%l1]
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleA57.td | 1147 def : InstRW<[A57Write_3cyc_1V], (instregex "VABS(fd|fq|hd|hq)")>; 1150 def : InstRW<[A57Write_5cyc_1V], (instregex "VABD(fd|fq|hd|hq)", 1151 "VADD(fd|fq|hd|hq)", "VPADD(f|h)", "VSUB(fd|fq|hd|hq)")>; 1157 "VC(EQ|GE|GT|LE)(fd|fq|hd|hq)")>; 1173 "(VMAX|VMIN)(fd|fq|hd|hq)", "(VPMAX|VPMIN)(f|h)", "(NEON|VFP)_VMAXNM", 1178 def : InstRW<[A57WriteVMUL_VecFP], (instregex "VMUL(sl)?(fd|fq|hd|hq)")>; 1185 (instregex "(VMLA|VMLS)(sl)?(fd|fq|hd|hq)", "(VFMA|VFMS)(fd|fq|hd|hq)")>;
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| H A D | ARMScheduleR52.td | 522 def : InstRW<[R52Write2FPALU_F5, R52Read_F1, R52Read_F1], (instregex "VABD(fq|hq)")>; 526 def : InstRW<[R52Write2FPALU_F5, R52Read_F1], (instregex "VABS(fq|hq)")>; 529 def : InstRW<[R52Write2FPALU_F3, R52Read_F1, R52Read_F1], (instregex "(VACGE|VACGT)(fq|hq)")>; 532 def : InstRW<[R52Write2FPALU_F5, R52Read_F1, R52Read_F1], (instregex "(VADD|VSUB)(fq|hq)")>;
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1624 SDValue fq = DAG.getNode(ISD::FMUL, DL, FltVT, in LowerDIVREM24() local 1628 fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq); in LowerDIVREM24() 1631 SDValue fqneg = DAG.getNode(ISD::FNEG, DL, FltVT, fq); in LowerDIVREM24() 1645 SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq); in LowerDIVREM24()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.td | 682 "std %fq, [$addr]", [], IIC_std>; 684 "std %fq, [$addr]", [], IIC_std>;
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