Home
last modified time | relevance | path

Searched refs:foo16 (Results 1 – 18 of 18) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/MSP430/
H A Dbit.ll86 @foo16 = external global i16
117 %t1 = load i16, i16* @foo16
124 ; CHECK: bit #4080, &foo16
127 %t1 = load i16, i16* @foo16
134 ; CHECK: bit #4080, &foo16
137 %t1 = load i16, i16* @foo16
144 ; CHECK: bit &foo16, r12
147 %t1 = load i16, i16* @foo16
154 ; CHECK: bit r12, &foo16
157 %t1 = load i16, i16* @foo16
[all …]
/llvm-project-15.0.7/lld/test/ELF/
H A Daarch64-lo12-alignment.s22 ldr q0, [x0, #:lo12:foo16] // Ok as foo16 is 16-byte aligned
26 .globl foo16
31 foo16: label
H A Daarch64-relocs.s150 ldr h17, [x19, :lo12:foo16]
151 ldrh w1, [x19, :lo12:foo16]
152 ldrh w2, [x19, :lo12:foo16 + 2]
153 foo16: label
/llvm-project-15.0.7/llvm/test/CodeGen/AVR/inline-asm/
H A Dinline-asm3.ll35 ; CHECK-NEXT: call foo16
38 tail call void @foo16(i16 signext %3, i16 signext %0, i16 signext %1)
42 declare void @foo16(i16 signext, i16 signext, i16 signext)
76 ; CHECK-NEXT: call foo16
79 tail call void @foo16(i16 signext %3, i16 signext %0, i16 signext %1)
112 ; CHECK-NEXT: call foo16
169 ; CHECK-NEXT: call foo16
217 ; CHECK-NEXT: call foo16
264 ; CHECK-NEXT: call foo16
324 ; CHECK-NEXT: call foo16
[all …]
/llvm-project-15.0.7/clang/test/Sema/
H A Dmips16_attr_allowed.c4 void foo16(void);
6 void __attribute__((mips16)) foo16(void);
H A Dwarn-strict-prototypes.c92 foo_t foo16; variable
93 void foo16(unsigned val); // OK
H A Dmips16_attr_not_allowed.c4 void __attribute__((mips16)) foo16(void); // expected-warning {{unknown attribute 'mips16' ignored}}
/llvm-project-15.0.7/clang/test/SemaObjC/
H A Dmethod-sentinel-attr.m23 - (id) foo16 : (id**)firstObj, ... __attribute__((sentinel(0,1)));
46 [ p foo16 : NULL];
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dpr28173.ll25 define i16 @foo16(i1 zeroext %i) #0 {
26 ; CHECK-LABEL: foo16:
H A Dh-register-store.ll39 define void @foo16(i16 inreg %p, ptr inreg %z) nounwind {
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A DbicZext.ll5 define zeroext i16 @foo16(i16 zeroext %f) nounwind readnone optsize ssp {
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Dload-with-non-coherent-cache.ll162 ; SM20-LABEL: .visible .entry foo16(
164 ; SM35-LABEL: .visible .entry foo16(
166 define void @foo16(<4 x float> * noalias readonly %from, <4 x float> * %to) {
263 !16 = !{void (<4 x float> *, <4 x float> *)* @foo16, !"kernel", i32 1}
/llvm-project-15.0.7/llvm/test/Analysis/MemorySSA/
H A Dpr41640.ll41 tail call void @foo16()
101 declare dso_local void @foo16() local_unnamed_addr #1
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-csel.ll228 define i32 @foo16(i32 %a, i32 %b) nounwind readnone optsize ssp {
229 ; CHECK-LABEL: foo16:
/llvm-project-15.0.7/flang/test/Fir/
H A Dtypes-to-llvm.fir352 func.func private @foo16(%arg0: !fir.vector<2:!fir.real<16>>)
353 // CHECK-LABEL: foo16
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dpromote-alloca-array-aggregate.ll223 %foo16 = fadd double %foo13, %foo15
224 %foo17 = fptrunc double %foo16 to float
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dfp16instrinsmc.ll235 define void @foo16() #0 {
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A D2009-01-19-fmod-constant-float-specials.ll298 define void @foo16() nounwind {