| /llvm-project-15.0.7/llvm/test/MC/AArch64/SVE/ |
| H A D | fmla-diagnostics.s | 7 fmla z0.h, p8/m, z1.h, z2.h label 16 fmla z0.s, p7/m, z1.h, z2.h label 25 fmla z0.h, z1.h, z8.h[0] label 30 fmla z0.s, z1.s, z8.s[0] label 35 fmla z0.d, z1.d, z16.s[0] label 44 fmla z0.h, z1.h, z2.h[-1] label 49 fmla z0.h, z1.h, z2.h[8] label 54 fmla z0.s, z1.s, z2.s[-1] label 59 fmla z0.s, z1.s, z2.s[4] label 69 fmla z0.d, z1.d, z2.d[2] label [all …]
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| H A D | fmla.s | 12 fmla z0.h, p7/m, z1.h, z31.h label 18 fmla z0.s, p7/m, z1.s, z31.s label 24 fmla z0.d, p7/m, z1.d, z31.d label 30 fmla z0.h, z1.h, z7.h[7] label 36 fmla z0.s, z1.s, z7.s[3] label 42 fmla z0.d, z1.d, z7.d[1] label 58 fmla z0.d, p7/m, z1.d, z31.d label 70 fmla z0.d, p7/m, z1.d, z31.d label 82 fmla z0.d, z1.d, z7.d[1] label
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| /llvm-project-15.0.7/llvm/test/MC/AArch64/ |
| H A D | neon-scalar-by-elem-mla.s | 6 fmla h0, h1, v1.h[5] 7 fmla s0, s1, v1.s[0] 8 fmla s30, s11, v1.s[1] 9 fmla s4, s5, v7.s[2] 10 fmla s16, s22, v16.s[3] 11 fmla d0, d1, v1.d[0] define 12 fmla d30, d11, v1.d[1]
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| H A D | neon-mla-mls-instructions.s | 43 fmla v0.4h, v1.4h, v2.4h 44 fmla v0.8h, v1.8h, v2.8h 45 fmla v0.2s, v1.2s, v2.2s 46 fmla v0.4s, v1.4s, v2.4s 47 fmla v0.2d, v1.2d, v2.2d
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| H A D | fullfp16-diagnostics.s | 4 fmla v0.4h, v1.4h, v16.h[3] 5 fmla v2.8h, v3.8h, v17.h[6] 44 fmla h0, h1, v16.h[3] 45 fmla h2, h3, v17.h[6]
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| H A D | noneon-diagnostics.s | 4 fmla v3.4s, v12.4s, v17.4s 5 fmla v1.2d, v30.2d, v20.2d 6 fmla v9.2s, v9.2s, v0.2s
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| H A D | neon-2velem.s | 49 fmla v0.4h, v1.4h, v2.h[2] 50 fmla v3.8h, v8.8h, v2.h[1] 51 fmla v0.2s, v1.2s, v2.s[2] 52 fmla v0.2s, v1.2s, v22.s[2] 53 fmla v3.4s, v8.4s, v2.s[1] 54 fmla v3.4s, v8.4s, v22.s[3] 55 fmla v0.2d, v1.2d, v2.d[1] 56 fmla v0.2d, v1.2d, v22.d[1]
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| H A D | fullfp16-neon-neg.s | 54 fmla v0.4h, v1.4h, v2.h[2] 56 fmla v3.8h, v8.8h, v2.h[1] 208 fmla v0.4h, v1.4h, v2.4h 210 fmla v0.8h, v1.8h, v2.8h 218 fmla h0, h1, v1.h[5]
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| H A D | arm64-diagno-predicate.s | 10 fmla v9.2s, v9.2s, v0.2s
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | arm64-fmuladd.ll | 16 ;CHECK: fmla.2s 17 ;CHECK-NOT: fmla.2s 27 ;CHECK: fmla.4s 28 ;CHECK-NOT: fmla.4s 38 ;CHECK: fmla.4s 39 ;CHECK: fmla.4s 40 ;CHECK-NOT: fmla.4s 61 ;CHECK: fmla.2d 62 ;CHECK-NOT: fmla.2d 72 ;CHECK: fmla.2d [all …]
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| H A D | sched-past-vector-ldst.ll | 3 ; Check that the vector store intrinsic does not prevent fmla instructions from 6 ; This allows fmla instructions to be scheduled together. 9 ; CHECK: fmla 12 ; CHECK-NEXT: fmla 13 ; CHECK-NEXT: fmla 14 ; CHECK-NEXT: fmla
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| H A D | neon-fma.ll | 4 ;CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 11 ;CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 18 ;CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 54 ;CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 60 ;CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 66 ;CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 97 ;CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 103 ;CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 109 ;CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 118 ;CHECK-NOT: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
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| H A D | fp16-fmla.ll | 51 ; CHECK: fmla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 60 ; CHECK: fmla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 69 ; CHECK: fmla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 78 ; CHECK: fmla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 91 ; CHECK-FIXME: fmla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 105 ; CHECK-FIXME: fmla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 119 ; CHECK-FIXME: fmla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 133 ; CHECK-FIXME: fmla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 144 ; CHECK: fmla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 163 ; CHECK: fmla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h [all …]
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| H A D | neon-scalar-by-elem-fma.ll | 12 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3] 20 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3] 28 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1] 36 ; CHECK: {{fmla d[0-9]+, d[0-9]+, v[0-9]+.d\[0]|fmadd d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}} 44 ; CHECK: fmla {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1] 52 ; CHECK: fmla {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1] 115 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3] 123 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3] 131 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1] 147 ; CHECK: fmla {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1] [all …]
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| H A D | arm64-fma-combines.ll | 19 ; CHECK: fmla.2d {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} 20 ; CHECK: fmla.2d {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}[0] 21 ; CHECK: fmla.d {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}[0] 62 ; CHECK: fmla.2s {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} 63 ; CHECK: fmla.2s {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}[0] 64 ; CHECK: fmla.s {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}[0] 105 ; CHECK: fmla.4s {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} 106 ; CHECK: fmla.4s {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}[0] 143 ; CHECK: fmla.2s {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}[0] 168 ; CHECK: fmla.2d {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}[0] [all …]
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| H A D | fp16_intrinsic_vector_3op.ll | 8 ; CHECK: fmla v0.4h, v2.4h, v1.4h 17 ; CHECK: fmla v0.8h, v2.8h, v1.8h
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| H A D | vldn_shuffle.ll | 12 ; CHECK-NEXT: fmla v2.4s, v1.4s, v1.4s 52 ; CHECK-NEXT: fmla v3.4s, v1.4s, v1.4s 53 ; CHECK-NEXT: fmla v3.4s, v2.4s, v2.4s 99 ; CHECK-NEXT: fmla v4.4s, v1.4s, v1.4s 101 ; CHECK-NEXT: fmla v5.4s, v3.4s, v3.4s 151 ; CHECK-NEXT: fmla v4.4s, v1.4s, v3.4s 193 ; CHECK-NEXT: fmla v2.4s, v1.4s, v1.4s 232 ; CHECK-NEXT: fmla v3.4s, v1.4s, v1.4s 233 ; CHECK-NEXT: fmla v3.4s, v2.4s, v2.4s 277 ; CHECK-NEXT: fmla v4.4s, v1.4s, v1.4s [all …]
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| H A D | fp16_intrinsic_lane.ll | 15 ; CHECK-NEXT: fmla v0.4h, v1.4h, v2.h[0] 27 ; CHECK-NEXT: fmla v0.8h, v1.8h, v2.h[0] 38 ; CHECK-NEXT: fmla v0.4h, v1.4h, v2.h[0] 49 ; CHECK-NEXT: fmla v0.8h, v1.8h, v2.h[0] 61 ; CHECK-NEXT: fmla v0.4h, v1.4h, v2.h[0] 74 ; CHECK-NEXT: fmla v0.8h, v1.8h, v2.h[0] 87 ; CHECK-NEXT: fmla h0, h1, v2.h[0] 98 ; CHECK-NEXT: fmla h0, h1, v2.h[0] 365 ; CHECK-NEXT: fmla h0, h1, v2.h[3] 376 ; CHECK-NEXT: fmla h0, h1, v2.h[7] [all …]
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| H A D | sve-fp-combine.ll | 7 ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h 18 ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h 29 ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h 40 ; CHECK-NEXT: fmla z0.s, p0/m, z1.s, z2.s 51 ; CHECK-NEXT: fmla z0.s, p0/m, z1.s, z2.s 62 ; CHECK-NEXT: fmla z0.d, p0/m, z1.d, z2.d 206 ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h 217 ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h 228 ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h 239 ; CHECK-NEXT: fmla z0.s, p0/m, z1.s, z2.s [all …]
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| H A D | neon-fma-FMF.ll | 6 ; CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 16 ; CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
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| H A D | arm64-neon-vector-shuffle-extract.ll | 41 ; CHECK-NEXT: fmla v0.4s, v0.4s, v0.4s 42 ; CHECK-NEXT: fmla v0.4s, v0.4s, v0.4s
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| H A D | machine-combiner-copy.ll | 27 ; CHECK-NEXT: fmla v3.8h, v1.8h, v0.h[0] 28 ; CHECK-NEXT: fmla v4.8h, v2.8h, v0.h[0]
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| H A D | sve-fixed-length-fp-fma.ll | 16 ; CHECK-NEXT: fmla v2.4h, v0.4h, v1.4h 28 ; CHECK-NEXT: fmla v2.8h, v0.8h, v1.8h 132 ; CHECK-NEXT: fmla v2.2s, v0.2s, v1.2s 144 ; CHECK-NEXT: fmla v2.4s, v0.4s, v1.4s 259 ; CHECK-NEXT: fmla v2.2d, v0.2d, v1.2d
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| /llvm-project-15.0.7/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| H A D | forwarding-A57.s | 8 # CHECK-NEXT: [0,1] DeeeeeeeeeER fmla v0.2s, v1.2s, v2.2s 15 # CHECK-NEXT: [0,1] DeeeeeeeeeeER fmla v0.4s, v1.4s, v2.4s 35 # CHECK: [0,0] DeeeeeeeeeER . fmla v0.2s, v1.2s, v2.2s 36 # CHECK-NEXT: [0,1] D====eeeeeeeeeER fmla v0.2s, v3.2s, v4.2s 288 fmla v0.2s, v1.2s, v2.2s label 293 fmla v0.4s, v1.4s, v2.4s label 307 fmla v0.2s, v1.2s, v2.2s label 308 fmla v0.2s, v3.2s, v4.2s label
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| /llvm-project-15.0.7/mlir/lib/Dialect/Math/Transforms/ |
| H A D | PolynomialApproximation.cpp | 914 auto fmla = [&](Value a, Value b, Value c) { in matchAndRewrite() local 951 Value q0 = fmla(cstCephesExpP1, y, cstCephesExpP0); in matchAndRewrite() 952 Value q1 = fmla(cstCephesExpP3, y, cstCephesExpP2); in matchAndRewrite() 954 Value expY = fmla(q1, y2, q0); in matchAndRewrite() 955 expY = fmla(q2, y4, expY); in matchAndRewrite() 1136 auto fmla = [&](Value a, Value b, Value c) { in matchAndRewrite() local 1191 Value v1 = fmla(y2, cstC10, cstC8); in matchAndRewrite() 1192 Value v2 = fmla(y2, v1, cstC6); in matchAndRewrite() 1193 Value v3 = fmla(y2, v2, cstC4); in matchAndRewrite() 1194 Value v4 = fmla(y2, v3, cstC2); in matchAndRewrite() [all …]
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