Home
last modified time | relevance | path

Searched refs:fmax (Results 1 – 25 of 226) sorted by relevance

12345678910

/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Dreduce-fmax.ll154 declare double @llvm.vector.reduce.fmax.v1f64(<1 x double>)
155 declare double @llvm.vector.reduce.fmax.v2f64(<2 x double>)
156 declare double @llvm.vector.reduce.fmax.v4f64(<4 x double>)
157 declare double @llvm.vector.reduce.fmax.v8f64(<8 x double>)
158 declare double @llvm.vector.reduce.fmax.v16f64(<16 x double>)
160 declare float @llvm.vector.reduce.fmax.v1f32(<1 x float>)
161 declare float @llvm.vector.reduce.fmax.v2f32(<2 x float>)
162 declare float @llvm.vector.reduce.fmax.v4f32(<4 x float>)
163 declare float @llvm.vector.reduce.fmax.v8f32(<8 x float>)
164 declare float @llvm.vector.reduce.fmax.v16f32(<16 x float>)
[all …]
/llvm-project-15.0.7/llvm/test/MC/AArch64/SVE/
H A Dfmax.s18 fmax z0.h, p0/m, z0.h, #0.0 label
24 fmax z0.s, p0/m, z0.s, #0.0 label
30 fmax z31.d, p7/m, z31.d, #1.0 label
36 fmax z31.h, p7/m, z31.h, #1.0 label
42 fmax z31.s, p7/m, z31.s, #1.0 label
48 fmax z0.d, p0/m, z0.d, #0.0 label
54 fmax z0.h, p7/m, z0.h, z31.h label
60 fmax z0.s, p7/m, z0.s, z31.s label
66 fmax z0.d, p7/m, z0.d, z31.d label
82 fmax z0.d, p0/m, z0.d, #0.0 label
[all …]
H A Dfmax-diagnostics.s6 fmax z0.h, p0/m, z0.h, #0.5 label
11 fmax z0.h, p0/m, z0.h, #-0.0 label
16 fmax z0.h, p0/m, z0.h, #0.0000000000000000000000001 label
21 fmax z0.h, p0/m, z0.h, #1.0000000000000000000000001 label
26 fmax z0.h, p0/m, z0.h, #0.9999999999999999999999999 label
35 fmax z0.h, p7/m, z1.h, z31.h label
44 fmax z0.b, p7/m, z0.b, z31.b label
49 fmax z0.h, p7/m, z0.h, z31.s label
58 fmax z0.h, p8/m, z0.h, z31.h label
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dvecreduce-fmax-legalization-nan.ll4 declare half @llvm.vector.reduce.fmax.v1f16(<1 x half> %a)
5 declare float @llvm.vector.reduce.fmax.v1f32(<1 x float> %a)
6 declare double @llvm.vector.reduce.fmax.v1f64(<1 x double> %a)
7 declare fp128 @llvm.vector.reduce.fmax.v1f128(<1 x fp128> %a)
9 declare float @llvm.vector.reduce.fmax.v3f32(<3 x float> %a)
10 declare fp128 @llvm.vector.reduce.fmax.v2f128(<2 x fp128> %a)
11 declare float @llvm.vector.reduce.fmax.v16f32(<16 x float> %a)
17 %b = call half @llvm.vector.reduce.fmax.v1f16(<1 x half> %a)
27 %b = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> %a)
43 %b = call fp128 @llvm.vector.reduce.fmax.v1f128(<1 x fp128> %a)
[all …]
H A Dvecreduce-fmax-legalization.ll5 declare half @llvm.vector.reduce.fmax.v1f16(<1 x half> %a)
6 declare float @llvm.vector.reduce.fmax.v1f32(<1 x float> %a)
7 declare double @llvm.vector.reduce.fmax.v1f64(<1 x double> %a)
8 declare fp128 @llvm.vector.reduce.fmax.v1f128(<1 x fp128> %a)
10 declare half @llvm.vector.reduce.fmax.v4f16(<4 x half> %a)
11 declare half @llvm.vector.reduce.fmax.v11f16(<11 x half> %a)
12 declare float @llvm.vector.reduce.fmax.v3f32(<3 x float> %a)
13 declare fp128 @llvm.vector.reduce.fmax.v2f128(<2 x fp128> %a)
14 declare float @llvm.vector.reduce.fmax.v16f32(<16 x float> %a)
20 %b = call nnan half @llvm.vector.reduce.fmax.v1f16(<1 x half> %a)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Dmath-intrins-sm80-ptx70-instcombine.ll16 declare half @llvm.nvvm.fmax.f16(half, half)
155 ; CHECK-NOT: @llvm.nvvm.fmax.f16
163 ; CHECK-NOT: @llvm.nvvm.fmax.ftz.f16
172 ; CHECK: @llvm.nvvm.fmax.ftz.f16
179 ; CHECK-NOT: @llvm.nvvm.fmax.f16x2
187 ; CHECK-NOT: @llvm.nvvm.fmax.ftz.f16x2
196 ; CHECK: @llvm.nvvm.fmax.ftz.f16x2
203 ; CHECK-NOT: @llvm.nvvm.fmax.nan.f
219 ; CHECK: @llvm.nvvm.fmax.ftz.nan.f
227 ; CHECK-NOT: @llvm.nvvm.fmax.nan.f16
[all …]
H A Dmath-intrins-sm86-ptx72.ll21 declare half @llvm.nvvm.fmax.xorsign.abs.f16(half, half)
22 declare half @llvm.nvvm.fmax.ftz.xorsign.abs.f16(half, half)
23 declare half @llvm.nvvm.fmax.nan.xorsign.abs.f16(half, half)
24 declare half @llvm.nvvm.fmax.ftz.nan.xorsign.abs.f16(half, half)
29 declare i16 @llvm.nvvm.fmax.xorsign.abs.bf16(i16, i16)
30 declare i16 @llvm.nvvm.fmax.nan.xorsign.abs.bf16(i16, i16)
31 declare i32 @llvm.nvvm.fmax.xorsign.abs.bf16x2(i32, i32)
32 declare i32 @llvm.nvvm.fmax.nan.xorsign.abs.bf16x2(i32, i32)
33 declare float @llvm.nvvm.fmax.xorsign.abs.f(float, float)
34 declare float @llvm.nvvm.fmax.ftz.xorsign.abs.f(float, float)
[all …]
H A Dmath-intrins-sm80-ptx70.ll24 declare float @llvm.nvvm.fmax.nan.f(float, float)
25 declare float @llvm.nvvm.fmax.ftz.nan.f(float, float)
26 declare half @llvm.nvvm.fmax.f16(half, half)
27 declare half @llvm.nvvm.fmax.ftz.f16(half, half)
28 declare half @llvm.nvvm.fmax.nan.f16(half, half)
29 declare half @llvm.nvvm.fmax.ftz.nan.f16(half, half)
34 declare i16 @llvm.nvvm.fmax.bf16(i16, i16)
35 declare i16 @llvm.nvvm.fmax.nan.bf16(i16, i16)
36 declare i32 @llvm.nvvm.fmax.bf16x2(i32, i32)
37 declare i32 @llvm.nvvm.fmax.nan.bf16x2(i32, i32)
[all …]
/llvm-project-15.0.7/libclc/amdgcn/lib/math/
H A Dfmax.cl5 _CLC_DEF _CLC_OVERLOAD float fmax(float x, float y)
8 * Otherwise fmax instruction flushes the values for comparison,
14 _CLC_BINARY_VECTORIZE(_CLC_OVERLOAD _CLC_DEF, float, fmax, float, float)
20 _CLC_DEF _CLC_OVERLOAD double fmax(double x, double y)
26 _CLC_BINARY_VECTORIZE(_CLC_OVERLOAD _CLC_DEF, double, fmax, double, double)
33 _CLC_DEF _CLC_OVERLOAD half fmax(half x, half y)
41 _CLC_BINARY_VECTORIZE(_CLC_OVERLOAD _CLC_DEF, half, fmax, half, half)
45 #define __CLC_BODY <../../../generic/lib/math/fmax.inc>
/llvm-project-15.0.7/libclc/generic/lib/math/
H A Dfmax.inc4 _CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE fmax(__CLC_GENTYPE x, float y) {
5 return fmax(x, (__CLC_GENTYPE)((__CLC_SCALAR_GENTYPE)y));
12 _CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE fmax(__CLC_GENTYPE x, double y) {
13 return fmax(x, (__CLC_GENTYPE)((__CLC_SCALAR_GENTYPE)y));
22 _CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE fmax(__CLC_GENTYPE x, half y) {
23 return fmax(x, (__CLC_GENTYPE)((__CLC_SCALAR_GENTYPE)y));
H A Dfmax.cl5 _CLC_DEFINE_BINARY_BUILTIN(float, fmax, __builtin_fmaxf, float, float);
11 _CLC_DEFINE_BINARY_BUILTIN(double, fmax, __builtin_fmax, double, double);
19 _CLC_DEF _CLC_OVERLOAD half fmax(half x, half y)
27 _CLC_BINARY_VECTORIZE(_CLC_OVERLOAD _CLC_DEF, half, fmax, half, half)
31 #define __CLC_BODY <fmax.inc>
/llvm-project-15.0.7/libclc/r600/lib/math/
H A Dfmax.cl6 _CLC_DEF _CLC_OVERLOAD float fmax(float x, float y)
8 /* Flush denormals if not enabled. Otherwise fmax instruction flushes
14 _CLC_BINARY_VECTORIZE(_CLC_OVERLOAD _CLC_DEF, float, fmax, float, float)
20 _CLC_DEF _CLC_OVERLOAD double fmax(double x, double y)
24 _CLC_BINARY_VECTORIZE(_CLC_OVERLOAD _CLC_DEF, double, fmax, double, double)
28 #define __CLC_BODY <../../../generic/lib/math/fmax.inc>
/llvm-project-15.0.7/llvm/test/MC/VE/
H A DFMAXMIN.s6 # CHECK-INST: fmax.d %s11, %s20, %s22
8 fmax.d %s11, %s20, %s22
10 # CHECK-INST: fmax.s %s11, 22, %s22
12 fmax.s %s11, 22, %s22
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dvector-reduce-fmax-nnan.ll464 declare float @llvm.vector.reduce.fmax.v1f32(<1 x float>)
465 declare float @llvm.vector.reduce.fmax.v2f32(<2 x float>)
466 declare float @llvm.vector.reduce.fmax.v4f32(<4 x float>)
467 declare float @llvm.vector.reduce.fmax.v8f32(<8 x float>)
468 declare float @llvm.vector.reduce.fmax.v16f32(<16 x float>)
470 declare double @llvm.vector.reduce.fmax.v2f64(<2 x double>)
471 declare double @llvm.vector.reduce.fmax.v3f64(<3 x double>)
472 declare double @llvm.vector.reduce.fmax.v4f64(<4 x double>)
473 declare double @llvm.vector.reduce.fmax.v8f64(<8 x double>)
474 declare double @llvm.vector.reduce.fmax.v16f64(<16 x double>)
[all …]
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Dneon-max-min.s70 fmax v0.4h, v1.4h, v2.4h
71 fmax v0.8h, v1.8h, v2.8h
72 fmax v0.2s, v1.2s, v2.2s
73 fmax v31.4s, v15.4s, v16.4s
74 fmax v7.2d, v8.2d, v25.2d
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/
H A Dfabs_vec_builtin.ll4 declare <4 x float> @llvm.mips.fmax.a.w(<4 x float>, <4 x float>)
15 %1 = tail call <4 x float> @llvm.mips.fmax.a.w(<4 x float> %0, <4 x float> %0)
21 declare <2 x double> @llvm.mips.fmax.a.d(<2 x double>, <2 x double>)
32 %1 = tail call <2 x double> @llvm.mips.fmax.a.d(<2 x double> %0, <2 x double> %0)
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/RISCV/
H A Dreduce-scalable-fp.ll503 declare half @llvm.vector.reduce.fmax.nxv1f16(<vscale x 1 x half>)
532 declare half @llvm.vector.reduce.fmax.nxv2f16(<vscale x 2 x half>)
543 declare half @llvm.vector.reduce.fmax.nxv4f16(<vscale x 4 x half>)
554 declare half @llvm.vector.reduce.fmax.nxv64f16(<vscale x 64 x half>)
565 declare float @llvm.vector.reduce.fmax.nxv1f32(<vscale x 1 x float>)
594 declare float @llvm.vector.reduce.fmax.nxv2f32(<vscale x 2 x float>)
605 declare float @llvm.vector.reduce.fmax.nxv4f32(<vscale x 4 x float>)
616 declare float @llvm.vector.reduce.fmax.nxv32f32(<vscale x 32 x float>)
627 declare double @llvm.vector.reduce.fmax.nxv1f64(<vscale x 1 x double>)
656 declare double @llvm.vector.reduce.fmax.nxv2f64(<vscale x 2 x double>)
[all …]
/llvm-project-15.0.7/compiler-rt/lib/builtins/hexagon/
H A Ddfminmax.S30 .global fmax
31 .type fmax,@function
58 fmax: label
/llvm-project-15.0.7/libc/src/math/generic/
H A Dfmax.cpp15 LLVM_LIBC_FUNCTION(double, fmax, (double x, double y)) {
16 return fputil::fmax(x, y);
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AArch64/
H A Dreduce-minmax.ll198 %V2f16 = call half @llvm.vector.reduce.fmax.v2f16(<2 x half> undef)
199 %V4f16 = call half @llvm.vector.reduce.fmax.v4f16(<4 x half> undef)
317 declare half @llvm.vector.reduce.fmax.v2f16(<2 x half>)
318 declare half @llvm.vector.reduce.fmax.v4f16(<4 x half>)
319 declare half @llvm.vector.reduce.fmax.v8f16(<8 x half>)
320 declare half @llvm.vector.reduce.fmax.v16f16(<16 x half>)
321 declare float @llvm.vector.reduce.fmax.v2f32(<2 x float>)
322 declare float @llvm.vector.reduce.fmax.v4f32(<4 x float>)
323 declare float @llvm.vector.reduce.fmax.v8f32(<8 x float>)
324 declare double @llvm.vector.reduce.fmax.v2f64(<2 x double>)
[all …]
/llvm-project-15.0.7/clang/test/Driver/
H A Drewrite-legacy-objc.m6 …ile" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fexceptions" "-fmax-type-align=16"
12 …ing-legacy-runtime" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fmax-type-align=16"
13 …ing-legacy-runtime" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fmax-type-align=16"
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/GlobalISel/legalizer/
H A Dfabs_vec_builtin.mir5 declare <4 x float> @llvm.mips.fmax.a.w(<4 x float>, <4 x float>)
8 declare <2 x double> @llvm.mips.fmax.a.d(<2 x double>, <2 x double>)
31 %3:_(<4 x s32>) = G_INTRINSIC intrinsic(@llvm.mips.fmax.a.w), %2(<4 x s32>), %2(<4 x s32>)
55 %3:_(<2 x s64>) = G_INTRINSIC intrinsic(@llvm.mips.fmax.a.d), %2(<2 x s64>), %2(<2 x s64>)
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dvecreduce-fmax-legalization-soft-float.ll4 declare half @llvm.vector.reduce.fmax.v4f16(<4 x half>)
5 declare float @llvm.vector.reduce.fmax.v4f32(<4 x float>)
6 declare double @llvm.vector.reduce.fmax.v2f64(<2 x double>)
7 declare fp128 @llvm.vector.reduce.fmax.v2f128(<2 x fp128>)
51 %b = call fast half @llvm.vector.reduce.fmax.v4f16(<4 x half> %a)
80 %b = call fast float @llvm.vector.reduce.fmax.v4f32(<4 x float> %a)
108 %b = call fast double @llvm.vector.reduce.fmax.v2f64(<2 x double> %a)
175 %b = call fast fp128 @llvm.vector.reduce.fmax.v2f128(<2 x fp128> %a)
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dfmaxnum.ll4 declare double @fmax(double, double)
22 ; CHECK: bl fmax
24 %z = call double @fmax(double %x, double %y) readnone
43 ; CHECK: bl fmax
/llvm-project-15.0.7/llvm/test/Bitcode/
H A Dupgrade-vecreduce-intrinsics.ll40 define float @fmax(<4 x float> %in) {
41 ; CHECK-LABEL: @fmax
42 ; CHECK: %res = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> %in)
43 %res = call float @llvm.experimental.vector.reduce.fmax.v4f32(<4 x float> %in)
103 declare float @llvm.experimental.vector.reduce.fmax.v4f32(<4 x float>)
104 ; CHECK: declare float @llvm.vector.reduce.fmax.v4f32(<4 x float>)

12345678910