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/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dcallee-saved-fpr64s.ll26 ; ILP32-NEXT: fld ft2, 16(a1)
27 ; ILP32-NEXT: fld ft3, 24(a1)
28 ; ILP32-NEXT: fld ft4, 32(a1)
29 ; ILP32-NEXT: fld ft5, 40(a1)
30 ; ILP32-NEXT: fld ft6, 48(a1)
31 ; ILP32-NEXT: fld ft7, 56(a1)
32 ; ILP32-NEXT: fld fa0, 64(a1)
33 ; ILP32-NEXT: fld fa1, 72(a1)
34 ; ILP32-NEXT: fld fa2, 80(a1)
35 ; ILP32-NEXT: fld fa3, 88(a1)
[all …]
H A Dcalling-conv-ilp32d.ll26 ; RV32-ILP32D-NEXT: fld fa0, %lo(.LCPI1_0)(a0)
56 ; RV32-ILP32D-NEXT: fld fa0, %lo(.LCPI3_0)(a0)
82 ; RV32-ILP32D-NEXT: fld ft0, 8(sp)
100 ; RV32-ILP32D-NEXT: fld fa0, %lo(.LCPI5_0)(a0)
102 ; RV32-ILP32D-NEXT: fld fa1, %lo(.LCPI5_1)(a0)
104 ; RV32-ILP32D-NEXT: fld fa2, %lo(.LCPI5_2)(a0)
106 ; RV32-ILP32D-NEXT: fld fa3, %lo(.LCPI5_3)(a0)
108 ; RV32-ILP32D-NEXT: fld fa4, %lo(.LCPI5_4)(a0)
110 ; RV32-ILP32D-NEXT: fld fa5, %lo(.LCPI5_5)(a0)
135 ; RV32-ILP32D-NEXT: fld ft0, 8(sp)
[all …]
H A Dinterrupt-attr.ll284 ; CHECK-RV32-FD-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
285 ; CHECK-RV32-FD-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
286 ; CHECK-RV32-FD-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
287 ; CHECK-RV32-FD-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
288 ; CHECK-RV32-FD-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
289 ; CHECK-RV32-FD-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
290 ; CHECK-RV32-FD-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
291 ; CHECK-RV32-FD-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
292 ; CHECK-RV32-FD-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
293 ; CHECK-RV32-FD-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
[all …]
H A Ddouble-mem.ll7 define dso_local double @fld(double *%a) nounwind {
8 ; CHECKIFD-LABEL: fld:
10 ; CHECKIFD-NEXT: fld ft0, 0(a0)
11 ; CHECKIFD-NEXT: fld ft1, 24(a0)
47 ; CHECKIFD-NEXT: fld ft0, %lo(G)(a0)
50 ; CHECKIFD-NEXT: fld ft0, 72(a1)
69 ; RV32IFD-NEXT: fld ft0, -273(a0)
78 ; RV64IFD-NEXT: fld ft0, -273(a0)
100 ; RV32IFD-NEXT: fld ft0, 8(sp)
103 ; RV32IFD-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload
[all …]
H A Dinline-asm-d-constraint-f.ll15 ; RV32F-NEXT: fld ft0, 8(sp)
17 ; RV32F-NEXT: fld ft1, %lo(gd)(a0)
30 ; RV64F-NEXT: fld ft0, %lo(gd)(a1)
48 ; RV32F-NEXT: fld fa1, 8(sp)
50 ; RV32F-NEXT: fld fs0, %lo(gd)(a0)
63 ; RV64F-NEXT: fld fs0, %lo(gd)(a1)
82 ; RV32F-NEXT: fld ft0, 8(sp)
91 ; RV32F-NEXT: fld ft0, 16(sp)
H A Dinline-asm-d-abi-names.ll349 ; RV32IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
361 ; RV64IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
378 ; RV32IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
390 ; RV64IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
407 ; RV32IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
419 ; RV64IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
436 ; RV32IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
448 ; RV64IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
781 ; RV32IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
793 ; RV64IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
[all …]
H A Ddouble-stack-spill-restore.ll14 ; RV32IFD-NEXT: fld ft0, 16(sp)
25 ; RV32IFD-NEXT: fld ft0, 16(sp)
26 ; RV32IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload
49 ; RV64IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload
H A Ddouble-calling-conv.ll16 ; RV32IFD-NEXT: fld ft0, 8(sp)
19 ; RV32IFD-NEXT: fld ft1, 8(sp)
59 ; RV32IFD-NEXT: fld ft0, 8(sp)
62 ; RV32IFD-NEXT: fld ft1, 8(sp)
103 ; RV32IFD-NEXT: fld ft0, 24(sp)
104 ; RV32IFD-NEXT: fld ft1, 16(sp)
H A Dghccc-rv32.ll36 ; CHECK-NEXT: fld fs11, %lo(d6)(a0)
38 ; CHECK-NEXT: fld fs10, %lo(d5)(a0)
40 ; CHECK-NEXT: fld fs9, %lo(d4)(a0)
42 ; CHECK-NEXT: fld fs8, %lo(d3)(a0)
44 ; CHECK-NEXT: fld fs7, %lo(d2)(a0)
46 ; CHECK-NEXT: fld fs6, %lo(d1)(a0)
H A Dghccc-rv64.ll36 ; CHECK-NEXT: fld fs11, %lo(d6)(a0)
38 ; CHECK-NEXT: fld fs10, %lo(d5)(a0)
40 ; CHECK-NEXT: fld fs9, %lo(d4)(a0)
42 ; CHECK-NEXT: fld fs8, %lo(d3)(a0)
44 ; CHECK-NEXT: fld fs7, %lo(d2)(a0)
46 ; CHECK-NEXT: fld fs6, %lo(d1)(a0)
H A Ddouble-round-conv-sat.ll30 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI1_0)(a0)
40 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI1_1)(a0)
123 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI3_0)(a0)
185 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI5_0)(a0)
195 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI5_1)(a0)
278 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI7_0)(a0)
340 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI9_0)(a0)
350 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI9_1)(a0)
433 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI11_0)(a0)
495 ; RV32IFD-NEXT: fld ft0, %lo(.LCPI13_0)(a0)
[all …]
H A Ddouble-previous-failure.ll25 ; RV32IFD-NEXT: fld ft0, 0(sp)
27 ; RV32IFD-NEXT: fld ft1, %lo(.LCPI1_0)(a0)
29 ; RV32IFD-NEXT: fld ft2, %lo(.LCPI1_1)(a0)
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dfp_constant_op.ll10 ; CHECK-NEXT: fld qword ptr [esp + 4]
20 ; CHECK-NEXT: fld qword ptr [esp + 4]
30 ; CHECK-NEXT: fld qword ptr [esp + 4]
40 ; CHECK-NEXT: fld dword ptr [{{\.?LCPI[0-9]+_[0-9]+}}]
50 ; CHECK-NEXT: fld qword ptr [esp + 4]
60 ; CHECK-NEXT: fld dword ptr [{{\.?LCPI[0-9]+_[0-9]+}}]
H A Dfp_load_fold.ll10 ; CHECK-NEXT: fld qword ptr [esp + 4]
22 ; CHECK-NEXT: fld qword ptr [esp + 4]
34 ; CHECK-NEXT: fld qword ptr [esp + 4]
46 ; CHECK-NEXT: fld qword ptr [eax]
58 ; CHECK-NEXT: fld qword ptr [esp + 4]
70 ; CHECK-NEXT: fld qword ptr [eax]
H A Dpr33349.ll21 ; KNL-NEXT: fld %st(0)
24 ; KNL-NEXT: fld %st(1)
28 ; KNL-NEXT: fld %st(2)
57 ; SKX-NEXT: fld %st(0)
60 ; SKX-NEXT: fld %st(1)
64 ; SKX-NEXT: fld %st(2)
H A Dpr34177.ll19 ; AVX512F-NEXT: fld %st(0)
22 ; AVX512F-NEXT: fld %st(1)
25 ; AVX512F-NEXT: fld %st(2)
58 ; AVX512VL-NEXT: fld %st(0)
63 ; AVX512VL-NEXT: fld %st(1)
67 ; AVX512VL-NEXT: fld %st(2)
H A Dlimited-prec.ll22 ; precision6-NEXT: fld %st(0)
50 ; precision12-NEXT: fld %st(0)
80 ; precision18-NEXT: fld %st(0)
124 ; precision6-NEXT: fld %st(0)
151 ; precision12-NEXT: fld %st(0)
180 ; precision18-NEXT: fld %st(0)
225 ; precision6-NEXT: fld %st(0)
253 ; precision12-NEXT: fld %st(0)
326 ; precision6-NEXT: fld %st(0)
418 ; precision6-NEXT: fld %st(0)
[all …]
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Drv32d-valid.s17 # CHECK-ASM-AND-OBJ: fld ft0, 12(a0)
19 fld f0, 12(a0) label
20 # CHECK-ASM-AND-OBJ: fld ft1, 4(ra)
22 fld f1, +4(ra) label
23 # CHECK-ASM-AND-OBJ: fld ft2, -2048(a3)
25 fld f2, -2048(x13) label
28 fld f3, %lo(2048)(s1) label
29 # CHECK-ASM-AND-OBJ: fld ft4, 2047(s2)
31 fld f4, 2047(s2) label
32 # CHECK-ASM-AND-OBJ: fld ft5, 0(s3)
[all …]
H A Drv32d-invalid.s5 fld ft1, -2049(a0) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tpre… label
9 fld ft1, a0, -200 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction label
13 fld ft15, 100(a0) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction label
14 fld ft1, 100(a10) # CHECK: :[[@LINE]]:14: error: expected register label
H A Dcompress-rv32d.s25 fld ft0, 64(sp) label
27 # CHECK-ALIAS: fld ft0, 64(sp)
35 fld fs0, 248(s0) label
37 # CHECK-ALIAS: fld fs0, 248(s0)
38 # CHECK-INST: c.fld fs0, 248(s0)
H A Drvd-aliases-valid.s26 # CHECK-INST: fld ft0, 0(a0)
27 # CHECK-ALIAS: fld ft0, 0(a0)
28 fld f0, (a0) label
50 # CHECK-INST: fld ft0, 0(a0)
51 # CHECK-ALIAS: fld ft0, 0(a0)
52 fld f0, (x10) label
H A Drvd-pseudos.s6 # CHECK: fld fa2, %pcrel_lo(.Lpcrel_hi0)(a2)
7 fld fa2, a_symbol, a2 label
H A Drv32dc-invalid.s4 c.fld ft3, 8(a5) # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
11 c.fld fs0, -8(sp) # CHECK: :[[@LINE]]:13: error: immediate must be a multiple of 8 bytes in the ra…
/llvm-project-15.0.7/llvm/test/MC/LoongArch/Basic/Float/
H A Dd-memory.s13 # ASM-AND-OBJ: fld.s $ft15, $t3, 250
15 fld.s $ft15, $t3, 250
17 # ASM-AND-OBJ: fld.d $ft14, $t5, 114
19 fld.d $ft14, $t5, 114
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DREADME-FPStack.txt33 fld P -> fld Q
34 fld Q fld P

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