| /llvm-project-15.0.7/llvm/test/MC/Mips/ |
| H A D | mips-fpu-instructions.s | 31 abs.s $f6,$f7 35 floor.w.s $f6,$f7 37 ceil.w.s $f6,$f7 41 neg.s $f6,$f7 43 round.w.s $f6,$f7 133 cvt.d.s $f6,$f7 136 cvt.s.w $f6,$f7 138 cvt.w.s $f6,$f7 183 mfc1 $a2,$f7 187 mov.s $f6,$f7 [all …]
|
| H A D | micromips-fpu-instructions.s | 377 c.f.s $f6, $f7 378 c.un.s $f6, $f7 379 c.eq.s $f6, $f7 380 c.olt.s $f6, $f7 381 c.ult.s $f6, $f7 382 c.ole.s $f6, $f7 383 c.ule.s $f6, $f7 384 c.sf.s $f6, $f7 385 c.ngle.s $f6, $f7 386 c.seq.s $f6, $f7 [all …]
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32/ |
| H A D | valid-mips32-el.txt | 3 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 6 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 48 0x38 0x30 0x07 0x46 # CHECK: c.sf.s $f6, $f7 93 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7 [all …]
|
| H A D | valid-mips32.txt | 159 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7 163 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7 176 0x46 0x00 0x39 0x84 # CHECK: sqrt.s $f6, $f7 177 0x46 0x00 0x39 0x85 # CHECK: abs.s $f6, $f7 178 0x46 0x00 0x39 0x86 # CHECK: mov.s $f6, $f7 179 0x46 0x00 0x39 0x87 # CHECK: neg.s $f6, $f7 197 0x46 0x07 0x30 0x30 # CHECK: c.f.s $f6, $f7 198 0x46 0x07 0x30 0x31 # CHECK: c.un.s $f6, $f7 199 0x46 0x07 0x30 0x32 # CHECK: c.eq.s $f6, $f7 204 0x46 0x07 0x30 0x38 # CHECK: c.sf.s $f6, $f7 [all …]
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| H A D | valid-mips32r5-el.txt | 4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 48 0x38 0x30 0x07 0x46 # CHECK: c.sf.s $f6, $f7 104 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7 [all …]
|
| H A D | valid-mips32r5.txt | 168 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7 173 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7 187 0x46 0x00 0x39 0x84 # CHECK: sqrt.s $f6, $f7 188 0x46 0x00 0x39 0x85 # CHECK: abs.s $f6, $f7 189 0x46 0x00 0x39 0x86 # CHECK: mov.s $f6, $f7 190 0x46 0x00 0x39 0x87 # CHECK: neg.s $f6, $f7 209 0x46 0x07 0x30 0x30 # CHECK: c.f.s $f6, $f7 210 0x46 0x07 0x30 0x31 # CHECK: c.un.s $f6, $f7 211 0x46 0x07 0x30 0x32 # CHECK: c.eq.s $f6, $f7 216 0x46 0x07 0x30 0x38 # CHECK: c.sf.s $f6, $f7 [all …]
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32r3/ |
| H A D | valid-mips32r3-el.txt | 4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 48 0x38 0x30 0x07 0x46 # CHECK: c.sf.s $f6, $f7 104 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7 [all …]
|
| H A D | valid-mips32r3.txt | 168 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7 173 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7 187 0x46 0x00 0x39 0x84 # CHECK: sqrt.s $f6, $f7 188 0x46 0x00 0x39 0x85 # CHECK: abs.s $f6, $f7 189 0x46 0x00 0x39 0x86 # CHECK: mov.s $f6, $f7 190 0x46 0x00 0x39 0x87 # CHECK: neg.s $f6, $f7 209 0x46 0x07 0x30 0x30 # CHECK: c.f.s $f6, $f7 210 0x46 0x07 0x30 0x31 # CHECK: c.un.s $f6, $f7 211 0x46 0x07 0x30 0x32 # CHECK: c.eq.s $f6, $f7 216 0x46 0x07 0x30 0x38 # CHECK: c.sf.s $f6, $f7 [all …]
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| H A D | valid-mips32r2-el.txt | 7 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 10 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 29 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 31 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 33 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 35 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 37 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 51 0x38 0x30 0x07 0x46 # CHECK: c.sf.s $f6, $f7 59 0x31 0x30 0x07 0x46 # CHECK: c.un.s $f6, $f7 108 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7 [all …]
|
| H A D | valid-mips32r2.txt | 171 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7 176 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7 190 0x46 0x00 0x39 0x84 # CHECK: sqrt.s $f6, $f7 191 0x46 0x00 0x39 0x85 # CHECK: abs.s $f6, $f7 192 0x46 0x00 0x39 0x86 # CHECK: mov.s $f6, $f7 193 0x46 0x00 0x39 0x87 # CHECK: neg.s $f6, $f7 212 0x46 0x07 0x30 0x30 # CHECK: c.f.s $f6, $f7 213 0x46 0x07 0x30 0x31 # CHECK: c.un.s $f6, $f7 214 0x46 0x07 0x30 0x32 # CHECK: c.eq.s $f6, $f7 219 0x46 0x07 0x30 0x38 # CHECK: c.sf.s $f6, $f7 [all …]
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| H A D | valid-mips64r3-el.txt | 4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 8 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 27 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 29 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 31 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 33 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 35 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 37 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 49 0x38 0x30 0x07 0x46 # CHECK: c.sf.s $f6, $f7 166 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7 [all …]
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| H A D | valid-mips64r5-el.txt | 4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 8 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 27 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 29 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 31 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 33 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 35 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 37 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 49 0x38 0x30 0x07 0x46 # CHECK: c.sf.s $f6, $f7 166 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7 [all …]
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64/ |
| H A D | valid-mips64-el.txt | 3 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 6 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 24 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 26 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 28 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 30 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 32 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 34 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 46 0x38 0x30 0x07 0x46 # CHECK: c.sf.s $f6, $f7 148 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7 [all …]
|
| /llvm-project-15.0.7/flang/test/Semantics/ |
| H A D | resolve59.f90 | 64 function f7() result(f7) !OKI (warning) function 65 real :: x, f7 local 67 x = acos(f7()) 68 f7 = x 69 x = acos(f7) !OK
|
| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| H A D | valid-mips64r2-el.txt | 7 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 11 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 30 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 32 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 34 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 36 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 38 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 52 0x38 0x30 0x07 0x46 # CHECK: c.sf.s $f6, $f7 60 0x31 0x30 0x07 0x46 # CHECK: c.un.s $f6, $f7 169 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7 [all …]
|
| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | coff-comdat.ll | 37 $"\01@f7@0" = comdat any 38 define x86_fastcallcc void @"\01@v7@0"() comdat($"\01@f7@0") { 41 define x86_fastcallcc void @"\01@f7@0"() comdat($"\01@f7@0") { 68 ; CHECK: .section .text,"xr",associative,@f7@0 70 ; CHECK: .section .text,"xr",discard,@f7@0 71 ; CHECK: .globl @f7@0
|
| /llvm-project-15.0.7/llvm/test/MC/ARM/ |
| H A D | aligned-blx.s | 33 @ CHECK: ff f7 fa ef blx _aligned 34 @ CHECK: ff f7 f8 ef blx _aligned 35 @ CHECK: ff f7 f6 ef blx _aligned 36 @ CHECK: ff f7 f2 ef blx _f1
|
| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | inline2.c | 36 extern inline int f7(void); 37 extern int f7(void) { return 0; } in f7() function 65 return f0() + f1() + f2() + f3() + f4() + f5() + f6() + f7() + f8() + f9() in test_all()
|
| /llvm-project-15.0.7/clang/test/Sema/ |
| H A D | warn-cast-function-type.c | 11 typedef int (f7)(long,...); typedef 19 f7 *g; 28 g = (f7 *)x; in foo()
|
| H A D | warn-unused-function.c | 23 static void f7(void); 25 void f9(void) { f8(f7); } in f9() 26 static void f7(void) {} in f7() function
|
| /llvm-project-15.0.7/clang/test/CodeGen/PowerPC/ |
| H A D | ppc64-soft-float.c | 23 struct f7 { float f[7]; }; struct 55 struct f7 func_f7(struct f7 x) { return x; } in func_f7() 134 struct f7 global_f7;
|
| /llvm-project-15.0.7/compiler-rt/test/profile/Posix/ |
| H A D | instrprof-visibility-kinds.inc | 21 void f7() __attribute__((visibility("internal"))); 22 void f7() {} 35 f7();
|
| /llvm-project-15.0.7/clang/test/CXX/dcl/dcl.fct/ |
| H A D | p17.cpp | 35 decltype(auto) f7(auto (*x)() -> int) { return x; } 38 static_assert(is_same_v<decltype(f7(return_int)), int (*)()>); 39 using f7c1 = decltype(f7(return_void)); // expected-error{{no matching}} 40 using f7c2 = decltype(f7(foo)); // expected-error{{no matching}} 41 static_assert(is_same_v<decltype(&f7), int (*(*)(int (*x)()))()>); 169 void f7(C auto... x); 171 static_assert(is_same_v<decltype(f7(1, 2)), void>); 172 static_assert(is_same_v<decltype(f7(1, 'a')), void>); 174 static_assert(is_same_v<decltype(f7('a', 2)), void>);
|
| /llvm-project-15.0.7/clang/test/SemaCXX/ |
| H A D | warn-cast-function-type.cpp | 11 typedef int (f7)(long,...); typedef 20 f7 *g; 38 g = (f7 *)x; in foo()
|
| H A D | dcl_ambig_res.cpp | 59 void f7(int(C7)) { } // expected-note{{candidate}} in f7() function 62 f7(1); // expected-error{{no matching function}} in foo7() 63 f7(g7); //OK in foo7()
|