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/llvm-project-15.0.7/mlir/test/Integration/Dialect/SparseTensor/CPU/
H A Dsparse_complex_ops.mlir39 ^bb(%a: complex<f64>, %b: complex<f64>, %x: complex<f64>):
55 ^bb(%a: complex<f64>, %x: complex<f64>):
70 ^bb(%a: complex<f64>, %x: complex<f64>):
85 ^bb(%a: complex<f64>, %x: complex<f64>):
100 ^bb(%a: complex<f64>, %x: complex<f64>):
113 %c = complex.constant [2.0 : f64, 0.0 : f64] : complex<f64>
117 ^bb(%a: complex<f64>, %x: complex<f64>):
132 ^bb(%a: complex<f64>, %x: f64):
177 tensor<?xcomplex<f64>, #SparseVector>) -> tensor<?xcomplex<f64>, #SparseVector>
179 : (tensor<?xcomplex<f64>, #SparseVector>) -> tensor<?xcomplex<f64>, #SparseVector>
[all …]
H A Dsparse_complex64.mlir30 ^bb(%a: complex<f64>, %b: complex<f64>, %x: complex<f64>):
32 linalg.yield %1 : complex<f64>
47 ^bb(%a: complex<f64>, %b: complex<f64>, %x: complex<f64>):
49 linalg.yield %1 : complex<f64>
57 …%mem = sparse_tensor.values %arg0 : tensor<?xcomplex<f64>, #SparseVector> to memref<?xcomplex<f64>>
62 vector.print %real : f64
63 vector.print %imag : f64
77 …%sv1 = sparse_tensor.convert %v1 : tensor<32xcomplex<f64>> to tensor<?xcomplex<f64>, #SparseVector>
78 …%sv2 = sparse_tensor.convert %v2 : tensor<32xcomplex<f64>> to tensor<?xcomplex<f64>, #SparseVector>
83 tensor<?xcomplex<f64>, #SparseVector>) -> tensor<?xcomplex<f64>, #SparseVector>
[all …]
H A Dsparse_binary.mlir54 ^bb(%a: f64, %b: f64, %x: f64):
55 %1 = sparse_tensor.binary %a, %b : f64, f64 to f64
79 ^bb(%a: f64, %b: f64, %x: f64):
80 %1 = sparse_tensor.binary %a, %b : f64, f64 to f64
103 ^bb(%a: f64, %b: f64, %x: f64):
148 ^bb(%a: f64, %b: f64, %x: f64):
174 ^bb0(%a: f64, %b: f64, %c: f64) :
196 ^bb0(%a: f64, %b: f64, %c: f64) :
224 ^bb0(%a: f64, %b: f64, %c: f64) :
261 ^bb0(%a: f64, %b: f64, %c: f64) :
[all …]
H A Dsparse_sum_c32.mlir33 %argx: tensor<complex<f64>>) -> tensor<complex<f64>> {
36 outs(%argx: tensor<complex<f64>>) {
37 ^bb(%a: complex<f64>, %x: complex<f64>):
39 linalg.yield %0 : complex<f64>
40 } -> tensor<complex<f64>>
41 return %0 : tensor<complex<f64>>
51 %d0 = complex.constant [0.0 : f64, 0.0 : f64] : complex<f64>
66 : (tensor<?x?xcomplex<f64>, #SparseMatrix>, tensor<complex<f64>>) -> tensor<complex<f64>>
74 %real = complex.re %v : complex<f64>
76 vector.print %real : f64
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/GPUToROCDL/
H A Dgpu-to-rocdl.mlir89 // CHECK: llvm.func @__ocml_fabs_f64(f64) -> f64
104 // CHECK: llvm.func @__ocml_ceil_f64(f64) -> f64
119 // CHECK: llvm.func @__ocml_floor_f64(f64) -> f64
134 // CHECK: llvm.func @__ocml_cos_f64(f64) -> f64
149 // CHECK: llvm.func @__ocml_exp_f64(f64) -> f64
166 // CHECK: llvm.func @__ocml_exp2_f64(f64) -> f64
222 // CHECK: llvm.func @__ocml_log_f64(f64) -> f64
352 // CHECK: llvm.func @__ocml_atan2_f64(f64, f64) -> f64
358 // CHECK: llvm.call @__ocml_atan2_f64(%{{.*}}) : (f64, f64) -> f64
367 // CHECK: llvm.func @__ocml_pow_f64(f64, f64) -> f64
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/ComplexToLibm/
H A Dconvert-to-libm.mlir4 // CHECK-DAG: @cpow(complex<f64>, complex<f64>) -> complex<f64>
6 // CHECK-DAG: @csqrt(complex<f64>) -> complex<f64>
8 // CHECK-DAG: @ctanh(complex<f64>) -> complex<f64>
9 // CHECK-DAG: @ccos(complex<f64>) -> complex<f64>
10 // CHECK-DAG: @csin(complex<f64>) -> complex<f64>
11 // CHECK-DAG: @conj(complex<f64>) -> complex<f64>
12 // CHECK-DAG: @cabs(complex<f64>) -> f64
13 // CHECK-DAG: @carg(complex<f64>) -> f64
14 // CHECK-DAG: @clog(complex<f64>) -> complex<f64>
22 …E_RESULT:.*]] = call @cpow(%[[DOUBLE]], %[[DOUBLE]]) : (complex<f64>, complex<f64>) -> complex<f64>
[all …]
/llvm-project-15.0.7/clang/test/Sema/
H A Daarch64-sve-vector-compare-ops.c9 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in eq() argument
20 …(void)(i8 == f64); // expected-error{{vector operands do not have the same number of elements ('sv… in eq()
31 …(void)(u8 == f64); // expected-error{{vector operands do not have the same number of elements ('sv… in eq()
42 …(void)(i16 == f64); // expected-error{{vector operands do not have the same number of elements ('s… in eq()
64 …(void)(i32 == f64); // expected-error{{vector operands do not have the same number of elements ('s… in eq()
135 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in neq() argument
146 …(void)(i8 != f64); // expected-error{{vector operands do not have the same number of elements ('sv… in neq()
261 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in lt() argument
387 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in leq() argument
513 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in gt() argument
[all …]
H A Daarch64-sve-vector-bitwise-ops.c9 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in and() argument
20 (void)(i8 & f64); // expected-error{{invalid operands to binary expression}} in and()
31 (void)(u8 & f64); // expected-error{{invalid operands to binary expression}} in and()
42 (void)(i16 & f64); // expected-error{{invalid operands to binary expression}} in and()
53 (void)(u16 & f64); // expected-error{{invalid operands to binary expression}} in and()
132 (void)(f64 & f64); // expected-error{{invalid operands to binary expression}} in and()
137 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in or() argument
261 (void)(f64 | f64); // expected-error{{invalid operands to binary expression}} in or()
387 (void)(f64 ^ f64); // expected-error{{invalid operands to binary expression}} in xor()
390 void not(svfloat16_t f16, svfloat32_t f32, svfloat32_t f64) { in not() argument
[all …]
H A Daarch64-sve-vector-arith-ops.c13 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in add() argument
127 (void)(f64 + b); // expected-error{{invalid operands to binary expression}} in add()
152 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in sub() argument
266 (void)(f64 - b); // expected-error{{invalid operands to binary expression}} in sub()
291 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in mul() argument
405 (void)(f64 * b); // expected-error{{invalid operands to binary expression}} in mul()
430 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in div() argument
544 (void)(f64 / b); // expected-error{{invalid operands to binary expression}} in div()
569 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in mod() argument
582 (void)(i8 % f64); // expected-error{{invalid operands to binary expression}} in mod()
[all …]
H A Daarch64-sve-vector-shift-ops.c9 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in lshift() argument
22 …(void)(i8 << f64); // expected-error{{used type 'svfloat64_t' (aka '__SVFloat64_t') where integer … in lshift()
35 …(void)(u8 << f64); // expected-error{{used type 'svfloat64_t' (aka '__SVFloat64_t') where integer … in lshift()
48 …(void)(i16 << f64); // expected-error{{used type 'svfloat64_t' (aka '__SVFloat64_t') where integer… in lshift()
142 (void)(f64 << b); // expected-error{{invalid operands to binary expression}} in lshift()
283 (void)(b << f64); // expected-error{{invalid operands to binary expression}} in lshift()
293 (void)(0.f << f64); // expected-error{{used type 'float' where integer is required}} in lshift()
298 svfloat16_t f16, svfloat32_t f32, svfloat64_t f64, in rshift() argument
431 (void)(f64 >> b); // expected-error{{invalid operands to binary expression}} in rshift()
572 (void)(b >> f64); // expected-error{{invalid operands to binary expression}} in rshift()
[all …]
/llvm-project-15.0.7/flang/test/Intrinsics/
H A Dmath-codegen.fir64 %4 = fir.call @hypot(%2, %3) : (f64, f64) -> f64
74 func.func private @hypot(f64, f64) -> f64
136 %4 = fir.call @hypot(%2, %3) : (f64, f64) -> f64
146 func.func private @hypot(f64, f64) -> f64
221 func.func private @hypot(f64, f64) -> f64
248 func.func private @llvm.trunc.f64(f64) -> f64
275 func.func private @llvm.trunc.f64(f64) -> f64
302 func.func private @llvm.trunc.f64(f64) -> f64
379 func.func private @llvm.round.f64(f64) -> f64
539 func.func private @atan2(f64, f64) -> f64
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dlog-exp-intrinsic.ll4 declare double @llvm.log.f64(double)
5 declare double @llvm.exp.f64(double)
6 declare double @llvm.log2.f64(double)
7 declare double @llvm.exp2.f64(double)
13 %1 = call double @llvm.exp.f64(double %a)
25 %2 = call double @llvm.log.f64(double %1)
37 %1 = call double @llvm.exp.f64(double %a)
38 %2 = call double @llvm.log.f64(double %1)
39 %3 = call double @llvm.exp.f64(double %2)
40 %4 = call double @llvm.log.f64(double %3)
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/ARM/
H A Dm7-fp.s5 vabs.f64 d0, d2
7 vadd.f64 d0, d2, d1
9 vcmp.f64 d1, d2
10 vcvt.f32.f64 s1, d2
99 vrinta.f64.f64 d0, d2
101 vrintm.f64.f64 d0, d2
103 vrintn.f64.f64 d0, d2
105 vrintp.f64.f64 d0, d2
107 vrintr.f64.f64 d0, d2
109 vrintz.f64.f64 d0, d2
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/SparseTensor/
H A Dinvalid.mlir182 %r = sparse_tensor.binary %arg0, %arg1 : f64, f64 to f64
196 %r = sparse_tensor.binary %arg0, %arg1 : f64, f64 to f64
200 ^bb0(%x: f64, %y: f64):
210 %r = sparse_tensor.binary %arg0, %arg1 : f64, f64 to f64
224 %0 = sparse_tensor.binary %arg0, %arg1 : f64, f64 to f64
248 func.func @invalid_binary_wrong_yield(%arg0: f64, %arg1: f64) -> f64 {
250 %0 = sparse_tensor.binary %arg0, %arg1 : f64, f64 to f64
331 ^bb0(%x: f64, %y: f64):
344 ^bb0(%x: f64, %y: f64):
353 func.func @invalid_reduce_wrong_yield(%arg0: f64, %arg1: f64) -> f64 {
[all …]
H A Droundtrip.mlir186 // CHECK-SAME: %[[A:.*]]: f64, %[[B:.*]]: i64) -> f64 {
200 func.func @sparse_binary(%arg0: f64, %arg1: i64) -> f64 {
202 %r = sparse_tensor.binary %arg0, %arg1 : f64, i64 to f64
212 return %r : f64
220 // CHECK-SAME: %[[A:.*]]: f64) -> f64 {
232 func.func @sparse_unary(%arg0: f64) -> f64 {
233 %r = sparse_tensor.unary %arg0 : f64 to f64
277 // CHECK-SAME: %[[A:.*]]: f64, %[[B:.*]]: f64) -> f64 {
280 // CHECK: ^bb0(%[[A1:.*]]: f64, %[[B1:.*]]: f64):
285 func.func @sparse_reduce_2d_to_1d(%arg0: f64, %arg1: f64) -> f64 {
[all …]
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dsingle-precision-fp.s5 vadd.f64 d0, d1, d2
6 vsub.f64 d2, d3, d4
7 vdiv.f64 d4, d5, d6
8 vmul.f64 d6, d7, d8
9 vnmul.f64 d8, d9, d10
46 vneg.f64 d15, d14
56 vcmpe.f64 d0, d1
57 vcmp.f64 d2, d3
58 vabs.f64 d4, d5
59 vcmpe.f64 d5, #0
[all …]
H A Dfp-armv8.s5 vcvtt.f64.f16 d3, s1
7 vcvtt.f16.f64 s5, d12
10 vcvtb.f64.f16 d3, s1
12 vcvtb.f16.f64 s4, d1
15 vcvttge.f64.f16 d3, s1
30 vcvta.s32.f64 s2, d3
38 vcvtp.s32.f64 s0, d4
109 vrinta.f64 d3, d4
113 vrintn.f64 d3, d4
117 vrintp.f64 d3, d4
[all …]
H A Dthumb-fp-armv8.s5 vcvtt.f64.f16 d3, s1
7 vcvtt.f16.f64 s5, d12
10 vcvtb.f64.f16 d3, s1
12 vcvtb.f16.f64 s4, d1
16 vcvttge.f64.f16 d3, s1
33 vcvta.s32.f64 s2, d3
41 vcvtp.s32.f64 s0, d4
115 vrinta.f64 d3, d4
119 vrintn.f64 d3, d4
123 vrintp.f64 d3, d4
[all …]
H A Dfp-armv8-m.s8 vcvtt.f64.f16 d3, s1
10 vcvtt.f16.f64 s5, d12
13 vcvtb.f64.f16 d3, s1
15 vcvtb.f16.f64 s4, d1
19 vcvttge.f64.f16 d3, s1
37 vcvta.s32.f64 s2, d3
41 vcvtn.s32.f64 s6, d7
120 vrinta.f64 d3, d4
124 vrintn.f64 d3, d4
128 vrintp.f64 d3, d4
[all …]
H A Ddirective-arch_extension-fp.s96 vrintz.f64.f64 d0, d0
104 vrintr.f64.f64 d0, d0
112 vrintx.f64.f64 d0, d0
121 vrinta.f64.f64 d0, d0
129 vrintn.f64.f64 d0, d0
137 vrintp.f64.f64 d0, d0
145 vrintm.f64.f64 d0, d0
232 vrintz.f64.f64 d0, d0
240 vrintr.f64.f64 d0, d0
248 vrintx.f64.f64 d0, d0
[all …]
H A Ddirective-arch_extension-simd.s68 vrintz.f64.f64 d0, d0
76 vrintr.f64.f64 d0, d0
84 vrintx.f64.f64 d0, d0
93 vrinta.f64.f64 d0, d0
101 vrintn.f64.f64 d0, d0
109 vrintp.f64.f64 d0, d0
117 vrintm.f64.f64 d0, d0
176 vrintz.f64.f64 d0, d0
184 vrintr.f64.f64 d0, d0
192 vrintx.f64.f64 d0, d0
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/GPUToNVVM/
H A Dgpu-to-nvvm.mlir170 // CHECK: llvm.func @__nv_fabs(f64) -> f64
185 // CHECK: llvm.func @__nv_ceil(f64) -> f64
215 // CHECK: llvm.func @__nv_cos(f64) -> f64
229 // CHECK: llvm.func @__nv_exp(f64) -> f64
243 // CHECK: llvm.func @__nv_exp2(f64) -> f64
258 // CHECK: llvm.func @__nv_log(f64) -> f64
318 // CHECK: llvm.func @__nv_sin(f64) -> f64
412 // CHECK: llvm.func @__nv_atan2(f64, f64) -> f64
424 // CHECK: llvm.call @__nv_atan2(%{{.*}}) : (f64, f64) -> f64
468 // CHECK: llvm.func @__nv_pow(f64, f64) -> f64
[all …]
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/
H A Dtest-reductions-f64.mlir8 %f1 = arith.constant 1.5: f64
9 %f2 = arith.constant 2.0: f64
10 %f3 = arith.constant 3.0: f64
11 %f4 = arith.constant 4.0: f64
12 %f5 = arith.constant 5.0: f64
13 %f6 = arith.constant -1.0: f64
14 %f7 = arith.constant -2.0: f64
37 vector.print %0 : f64
40 vector.print %1 : f64
43 vector.print %2 : f64
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/MathToLibm/
H A Dconvert-to-libm.mlir3 // CHECK-DAG: @atan(f64) -> f64
5 // CHECK-DAG: @erf(f64) -> f64
7 // CHECK-DAG: @expm1(f64) -> f64
9 // CHECK-DAG: @atan2(f64, f64) -> f64
11 // CHECK-DAG: @tan(f64) -> f64
13 // CHECK-DAG: @tanh(f64) -> f64
15 // CHECK-DAG: @round(f64) -> f64
17 // CHECK-DAG: @cos(f64) -> f64
19 // CHECK-DAG: @sin(f64) -> f64
72 func.func @tanh_caller(%float: f32, %double: f64) -> (f32, f64) {
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dfloat-intrinsics-double.ll12 ; HARD: vsqrt.f64 d0, d0
102 ; HARD: vfma.f64
118 ; DP: vabs.f64 d0, d0
143 ; FP-ARMv8: vrintm.f64
153 ; FP-ARMv8: vrintp.f64
163 ; FP-ARMv8: vrintz.f64
173 ; FP-ARMv8: vrintx.f64
203 ; VFP4: vmul.f64
204 ; VFP4: vadd.f64
205 ; FP-ARMv8: vfma.f64
[all …]

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