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/llvm-project-15.0.7/llvm/test/Bitcode/
H A Dnocfivalue.ll23 ; CHECK: call void no_cfi @f5()
24 call void no_cfi @f5()
25 ; CHECK: call void @f5()
26 call void @f5()
33 ; CHECK: declare void @f5()
34 declare void @f5()
38 ; CHECK: store void ()* no_cfi @f5, void ()** %n, align 8
39 store void ()* no_cfi @f5, void ()** %n, align 8
/llvm-project-15.0.7/flang/test/Semantics/
H A Dresolve59.f9047 function f5(x) function
54 procedure(rfunc), pointer :: f5 local
55 f5 => rfunc
57 x = acos(f5(x+1))
59 x = acos(f5)
113 function f5(x) result(r) function
118 x = acos(f5(x+1)) ! recursive call
120 x = acos(f5)
/llvm-project-15.0.7/llvm/test/MC/Mips/micromips32r6/
H A Dvalid.s179 add.s $f3, $f4, $f5 # CHECK: add.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x30]
182 sub.s $f3, $f4, $f5 # CHECK: sub.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x70]
185 mul.s $f3, $f4, $f5 # CHECK: mul.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xb0]
188 div.s $f3, $f4, $f5 # CHECK: div.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xf0]
259 floor.l.s $f3, $f5 # CHECK: floor.l.s $f3, $f5 # encoding: [0x54,0x65,0x03,0x3b]
261 floor.w.s $f3, $f5 # CHECK: floor.w.s $f3, $f5 # encoding: [0x54,0x65,0x0b,0x3b]
263 ceil.l.s $f3, $f5 # CHECK: ceil.l.s $f3, $f5 # encoding: [0x54,0x65,0x13,0x3b]
265 ceil.w.s $f3, $f5 # CHECK: ceil.w.s $f3, $f5 # encoding: [0x54,0x65,0x1b,0x3b]
267 trunc.l.s $f3, $f5 # CHECK: trunc.l.s $f3, $f5 # encoding: [0x54,0x65,0x23,0x3b]
269 trunc.w.s $f3, $f5 # CHECK: trunc.w.s $f3, $f5 # encoding: [0x54,0x65,0x2b,0x3b]
[all …]
/llvm-project-15.0.7/lld/test/ELF/
H A Dicf-keep-unique.s5 # RUN: ld.lld %t -o %t2 --keep-unique f2 --keep-unique f4 --keep-unique f5 --icf=all --print-icf-se…
40 # f5 is local, not found by --keep-unique f5
41 .section .text.f5, "ax"
42 f5: label
H A Dpartitions.s47 .quad f5
53 .quad f5
64 .section .text.f5,"ax",@progbits
65 f5: label
H A Dicf-ineligible.s13 # CHECK: removing identical section {{.*}}:(.text.f5)
15 .globl d, d_alias, fu, f1, f2, f3, f4, f5
42 .section .text.f5,"ax",@progbits
43 f5: label
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dcortex-a57-misched-vfma.ll6 define arm_aapcs_vfpcc float @Test1(float %f1, float %f2, float %f3, float %f4, float %f5, float %f…
35 ; f1 * f2 + f3 * f4 + f5 * f6 ==> VMULS, VMLAS, VMLAS
38 %mul3 = fmul float %f5, %f6
45 … float> %f1, <2 x float> %f2, <2 x float> %f3, <2 x float> %f4, <2 x float> %f5, <2 x float> %f6) {
74 ; f1 * f2 + f3 * f4 + f5 * f6 ==> VMULS, VMLAS, VMLAS
77 %mul3 = fmul <2 x float> %f5, %f6
83 define arm_aapcs_vfpcc float @Test3(float %f1, float %f2, float %f3, float %f4, float %f5, float %f…
112 ; f1 * f2 + f3 * f4 + f5 * f6 ==> VMULS, VMLSS, VMLSS
115 %mul3 = fmul float %f5, %f6
151 ; f1 * f2 + f3 * f4 + f5 * f6 ==> VMULS, VMLSS, VMLSS
[all …]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips3d/
H A Dvalid.s6 cvt.pw.ps $f5, $f20 # CHECK: cvt.pw.ps $f5, $f20 # encoding: [0x46,0xc0,0xa1,0x64]
7 mulr.ps $f23, $f5, $f1 # CHECK: mulr.ps $f23, $f5, $f1 # encoding: [0x46,0xc1,0x2d,0xda]
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Ddeduced-return-void.cpp20 auto f5() { in f5() function
48 decltype(auto) f5() { in f5() function
80 auto *f5() { in f5() function
116 auto& f5() { in f5() function
H A Dwarn-cast-function-type.cpp9 typedef void (f5)(void); typedef
18 f5 *e;
36 e = (f5 *)x; in foo()
/llvm-project-15.0.7/llvm/test/CodeGen/XCore/
H A Depilogue_prologue.ll122 ; CHECKFP-NEXT: bl f5
127 ; CHECKFP-NEXT: bl f5
163 ; CHECK-NEXT: bl f5
167 ; CHECK-NEXT: bl f5
176 declare void @f5(i32*)
181 call void @f5(i32* %1)
183 call void @f5(i32* %2)
195 ; CHECKFP-NEXT: bl f5
205 ; CHECK-NEXT: bl f5
223 ; CHECKFP-NEXT: bl f5
[all …]
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dmicrosoft-call-conv-x64.c10 void __stdcall f5(void) { in f5() function
20 void (__stdcall *pf5)(void) = f5;
23 f4(); f5(); in main()
H A Dinline2.c26 extern inline int f5(void);
27 inline int f5(void) { return 0; } in f5() function
65 return f0() + f1() + f2() + f3() + f4() + f5() + f6() + f7() + f8() + f9() in test_all()
H A Dmicrosoft-call-conv.c13 void __stdcall f5(void) { in f5() function
34 void (__stdcall *pf5)(void) = f5;
39 f4(); f5(); f6(); f61(); in main()
/llvm-project-15.0.7/clang/test/Sema/
H A Dwarn-cast-function-type.c9 typedef void (f5)(void); typedef
17 f5 *e;
26 e = (f5 *)x; in foo()
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dvisibility-inlines-hidden.cpp11 static void f5() { } in f5() function
23 static void f5() { } in f5() function
47 X0::f5(); in use()
59 X1<int>::f5(); in use()
H A Dfinegrain-bitfield-access.cpp12 unsigned f5:8; member
53 return a1.f5; in read8_2()
68 a1.f5 = 3; in write8_2()
/llvm-project-15.0.7/clang/test/CodeGen/PowerPC/
H A Dppc64-soft-float.c21 struct f5 { float f[5]; }; struct
49 struct f5 func_f5(struct f5 x) { return x; } in func_f5()
117 struct f5 global_f5;
/llvm-project-15.0.7/compiler-rt/test/profile/Posix/
H A Dinstrprof-visibility-kinds.inc15 void f5() __attribute__((visibility("default")));
16 void f5() {}
33 f5();
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/micromips32r6/
H A Dvalid.txt127 0x54 0xa4 0x18 0x30 # CHECK: add.s $f3, $f4, $f5
129 0x54 0xa4 0x18 0x70 # CHECK: sub.s $f3, $f4, $f5
131 0x54 0xa4 0x18 0xb0 # CHECK: mul.s $f3, $f4, $f5
193 0x54 0x65 0x03 0x7b # CHECK: abs.s $f3, $f5
195 0x54 0x65 0x03 0x3b # CHECK: floor.l.s $f3, $f5
197 0x54 0x65 0x0b 0x3b # CHECK: floor.w.s $f3, $f5
199 0x54 0x65 0x13 0x3b # CHECK: ceil.l.s $f3, $f5
201 0x54 0x65 0x1b 0x3b # CHECK: ceil.w.s $f3, $f5
203 0x54 0x65 0x23 0x3b # CHECK: trunc.l.s $f3, $f5
207 0x54 0x65 0x0a 0x3b # CHECK: sqrt.s $f3, $f5
[all …]
/llvm-project-15.0.7/lld/docs/
H A Dpartitions.dot10 f5 [style=filled,fillcolor=lightblue];
17 f1 -> f5;
20 f2 -> f5;
/llvm-project-15.0.7/clang/test/SemaTemplate/
H A Ddependent-type-identity.cpp52 void f5(typename T::template apply<U>::type*); // expected-note{{previous}}
53 void f5(typename U::template apply<U>::type*);
54 void f5(typename U::template apply<T>::type*);
55 void f5(typename type::template apply<T>::type*);
56 void f5(typename type::template apply<U_type>::type*); // expected-error{{redeclar}}
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dpatchable-function-entry.ll32 $f5 = comdat any
33 define void @f5() "patchable-function-entry"="5" comdat {
34 ; CHECK-LABEL: f5:
40 ; CHECK: .section __patchable_function_entries,"aGwo",@progbits,f5,comdat,f5{{$}}
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dbase-offset-addr.ll8 %f5 = alloca i32, align 4
11 %f5.0.load185 = load volatile i32, i32* %f5, align 4
/llvm-project-15.0.7/llvm/test/DebugInfo/Generic/
H A Dlinkage-name-abstract.ll22 ; __attribute__((always_inline)) void f5();
24 ; void F4::f5() {
28 ; F4::f5();
52 ; For F4::f5(), first we see the in-class declaration,
58 ; REF-NEXT: DW_AT_name ("f5")
122 !15 = distinct !DISubprogram(name: "f5", linkageName: "_ZN2F42f5Ev", scope: !16, file: !1, line: 12…
125 !18 = !DISubprogram(name: "f5", linkageName: "_ZN2F42f5Ev", scope: !16, file: !1, line: 10, type: !…

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