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/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32r3/
H A Dvalid-xfail-mips32r3.txt31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30
58 0x4c 0x42 0x75 0xa6 # CHECK: madd.ps $f22, $f2, $f14, $f2
59 0x46 0xc0 0x85 0x86 # CHECK: mov.ps $f22, $f16
77 0x46 0x20 0xb5 0x89 # CHECK: trunc.l.d $f22, $f22
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32r5/
H A Dvalid-xfail-mips32r5.txt31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30
58 0x4c 0x42 0x75 0xa6 # CHECK: madd.ps $f22, $f2, $f14, $f2
59 0x46 0xc0 0x85 0x86 # CHECK: mov.ps $f22, $f16
77 0x46 0x20 0xb5 0x89 # CHECK: trunc.l.d $f22, $f22
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32r2/
H A Dvalid-xfail-mips32r2.txt31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30
58 0x4c 0x42 0x75 0xa6 # CHECK: madd.ps $f22, $f2, $f14, $f2
59 0x46 0xc0 0x85 0x86 # CHECK: mov.ps $f22, $f16
77 0x46 0x20 0xb5 0x89 # CHECK: trunc.l.d $f22, $f22
/llvm-project-15.0.7/llvm/test/MC/Mips/mips64/
H A Dvalid.s67 …c.sf.s $f14, $f22 # CHECK: c.sf.s $f14, $f22 # encoding: [0x46,0x16,0…
74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0…
88 … cvt.d.s $f22,$f28 # CHECK: cvt.d.s $f22, $f28 # encoding: [0x46,0x00,0xe5,0xa1]
100 … cvt.s.w $f22,$f15 # CHECK: cvt.s.w $f22, $f15 # encoding: [0x46,0x80,0x7d,0xa0]
206 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
312 sqrt.d $f17,$f22
349 sub.s $f23,$f22,$f22
394 … trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips4/
H A Dvalid.s67 …c.sf.s $f14, $f22 # CHECK: c.sf.s $f14, $f22 # encoding: [0x46,0x16,0…
74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0…
86 … cvt.d.s $f22,$f28 # CHECK: cvt.d.s $f22, $f28 # encoding: [0x46,0x00,0xe5,0xa1]
98 … cvt.s.w $f22,$f15 # CHECK: cvt.s.w $f22, $f15 # encoding: [0x46,0x80,0x7d,0xa0]
194 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
293 sqrt.d $f17,$f22
330 sub.s $f23,$f22,$f22
374 … trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d]
H A Dinvalid-mips5-wrong-error.s9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
27 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
28 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/llvm-project-15.0.7/llvm/test/MC/Mips/mips5/
H A Dvalid.s67 …c.sf.s $f14, $f22 # CHECK: c.sf.s $f14, $f22 # encoding: [0x46,0x16,0…
74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0…
86 … cvt.d.s $f22,$f28 # CHECK: cvt.d.s $f22, $f28 # encoding: [0x46,0x00,0xe5,0xa1]
98 … cvt.s.w $f22,$f15 # CHECK: cvt.s.w $f22, $f15 # encoding: [0x46,0x80,0x7d,0xa0]
195 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
294 sqrt.d $f17,$f22
331 sub.s $f23,$f22,$f22
376 … trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips3/
H A Dinvalid-mips5-wrong-error.s9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
27 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
28 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
H A Dvalid.s43 c.sf.s $f14,$f22
54 … cvt.d.s $f22,$f28 # CHECK: cvt.d.s $f22, $f28 # encoding: [0x46,0x00,0xe5,0xa1]
66 … cvt.s.w $f22,$f15 # CHECK: cvt.s.w $f22, $f15 # encoding: [0x46,0x80,0x7d,0xa0]
233 sqrt.d $f17,$f22
270 sub.s $f23,$f22,$f22
313 … trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips2/
H A Dinvalid-mips5-wrong-error.s9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
27 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
28 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips2/
H A Dvalid-mips2-el.txt37 0x38 0x70 0x16 0x46 # CHECK: c.sf.s $f14, $f22
42 0xa1 0xe5 0x00 0x46 # CHECK: cvt.d.s $f22, $f28
45 0xa0 0x7d 0x80 0x46 # CHECK: cvt.s.w $f22, $f15
116 0x04 0xb4 0x20 0x46 # CHECK: sqrt.d $f16, $f22
131 0xc1 0xb5 0x16 0x46 # CHECK: sub.s $f23, $f22, $f22
161 0x8d 0x75 0x20 0x46 # CHECK: trunc.w.d $f22, $f14
H A Dvalid-mips2.txt122 0x46 0x00 0xe5 0xa1 # CHECK: cvt.d.s $f22, $f28
127 0x46 0x16 0x70 0x38 # CHECK: c.sf.s $f14, $f22
128 0x46 0x16 0xb5 0xc1 # CHECK: sub.s $f23, $f22, $f22
135 0x46 0x20 0x75 0x8d # CHECK: trunc.w.d $f22, $f14
137 0x46 0x20 0xb4 0x04 # CHECK: sqrt.d $f16, $f22
148 0x46 0x80 0x7d 0xa0 # CHECK: cvt.s.w $f22, $f15
/llvm-project-15.0.7/llvm/test/MC/PowerPC/
H A Dppc64-regs.s61 #CHECK: .cfi_offset f22, 476
62 #CHECK: .cfi_offset f22, 484
178 .cfi_offset f22,476
179 .cfi_offset f22,484
/llvm-project-15.0.7/llvm/test/MC/Mips/mips64r6/
H A Dinvalid-mips5-wrong-error.s8 … abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 … madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
31 … mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips1/
H A Dvalid-mips1-el.txt30 0x38 0x70 0x16 0x46 # CHECK: c.sf.s $f14, $f22
33 0xa1 0xe5 0x00 0x46 # CHECK: cvt.d.s $f22, $f28
36 0xa0 0x7d 0x80 0x46 # CHECK: cvt.s.w $f22, $f15
107 0xc1 0xb5 0x16 0x46 # CHECK: sub.s $f23, $f22, $f22
H A Dvalid-mips1.txt79 0x46 0x00 0xe5 0xa1 # CHECK: cvt.d.s $f22, $f28
82 0x46 0x16 0x70 0x38 # CHECK: c.sf.s $f14, $f22
83 0x46 0x16 0xb5 0xc1 # CHECK: sub.s $f23, $f22, $f22
98 0x46 0x80 0x7d 0xa0 # CHECK: cvt.s.w $f22, $f15
/llvm-project-15.0.7/llvm/test/MC/Mips/mips64r3/
H A Dvalid.s67 …c.sf.s $f14, $f22 # CHECK: c.sf.s $f14, $f22 # encoding: [0x46,0x16,0…
74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0…
88 … cvt.d.s $f22,$f28 # CHECK: cvt.d.s $f22, $f28 # encoding: [0x46,0x00,0xe5,0xa1]
100 … cvt.s.w $f22,$f15 # CHECK: cvt.s.w $f22, $f15 # encoding: [0x46,0x80,0x7d,0xa0]
360 sqrt.d $f17,$f22
398 sub.s $f23,$f22,$f22
445 … trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips64r2/
H A Dvalid.s68 …c.sf.s $f14, $f22 # CHECK: c.sf.s $f14, $f22 # encoding: [0x46,0x16,0…
75 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0…
89 … cvt.d.s $f22,$f28 # CHECK: cvt.d.s $f22, $f28 # encoding: [0x46,0x00,0xe5,0xa1]
101 … cvt.s.w $f22,$f15 # CHECK: cvt.s.w $f22, $f15 # encoding: [0x46,0x80,0x7d,0xa0]
373 sqrt.d $f17,$f22
411 sub.s $f23,$f22,$f22
458 … trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips64r5/
H A Dvalid.s67 …c.sf.s $f14, $f22 # CHECK: c.sf.s $f14, $f22 # encoding: [0x46,0x16,0…
74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0…
88 … cvt.d.s $f22,$f28 # CHECK: cvt.d.s $f22, $f28 # encoding: [0x46,0x00,0xe5,0xa1]
100 … cvt.s.w $f22,$f15 # CHECK: cvt.s.w $f22, $f15 # encoding: [0x46,0x80,0x7d,0xa0]
366 sqrt.d $f17,$f22
404 sub.s $f23,$f22,$f22
451 … trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32/
H A Dvalid.s70 …c.sf.s $f14, $f22 # CHECK: c.sf.s $f14, $f22 # encoding: [0x46,0x16,0…
77 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0…
95 cvt.s.w $f22,$f15
269 sub.s $f23,$f22,$f22
310 … trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f14 # encoding: [0x46,0x20,0x75,0x8d]
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips3/
H A Dvalid-mips3-el.txt36 0x38 0x70 0x16 0x46 # CHECK: c.sf.s $f14, $f22
43 0xa1 0xe5 0x00 0x46 # CHECK: cvt.d.s $f22, $f28
50 0xa0 0x7d 0x80 0x46 # CHECK: cvt.s.w $f22, $f15
163 0x04 0xb4 0x20 0x46 # CHECK: sqrt.d $f16, $f22
178 0xc1 0xb5 0x16 0x46 # CHECK: sub.s $f23, $f22, $f22
209 0x8d 0x75 0x20 0x46 # CHECK: trunc.w.d $f22, $f14
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r2/
H A Dvalid-xfail-mips64r2.txt31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
37 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30
51 0x4c 0x42 0x75 0xa6 # CHECK: madd.ps $f22, $f2, $f14, $f2
52 0x46 0xc0 0x85 0x86 # CHECK: mov.ps $f22, $f16
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r3/
H A Dvalid-xfail-mips64r3.txt31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
37 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30
51 0x4c 0x42 0x75 0xa6 # CHECK: madd.ps $f22, $f2, $f14, $f2
52 0x46 0xc0 0x85 0x86 # CHECK: mov.ps $f22, $f16
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r5/
H A Dvalid-xfail-mips64r5.txt31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
37 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30
51 0x4c 0x42 0x75 0xa6 # CHECK: madd.ps $f22, $f2, $f14, $f2
52 0x46 0xc0 0x85 0x86 # CHECK: mov.ps $f22, $f16
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/cconv/
H A Dcallee-saved-float.ll28 …~{$f13},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{…
58 ; O32-DAG: sdc1 [[F22:\$f22]], [[OFF22:[0-9]+]]($sp)
77 ; N32-DAG: sdc1 [[F22:\$f22]], [[OFF22:[0-9]+]]($sp)
96 ; N64-INV-NOT: sdc1 $f22,

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