| /llvm-project-15.0.7/llvm/test/MC/RISCV/ |
| H A D | numeric-reg-names-f.s | 7 # CHECK-NUMERIC: fsqrt.s f10, f0
12 # CHECK-NUMERIC: fsqrt.s f10, f1
17 # CHECK-NUMERIC: fsqrt.s f10, f2
22 # CHECK-NUMERIC: fsqrt.s f10, f3
27 # CHECK-NUMERIC: fsqrt.s f10, f4
32 # CHECK-NUMERIC: fsqrt.s f10, f5
37 # CHECK-NUMERIC: fsqrt.s f10, f6
42 # CHECK-NUMERIC: fsqrt.s f10, f7
57 # CHECK-NUMERIC: fsqrt.s f10, f10
58 # CHECK-NUMERIC-NEXT: fsqrt.s f10, f10
[all …]
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| H A D | numeric-reg-names-d.s | 7 # CHECK-NUMERIC: fsqrt.d f10, f0
12 # CHECK-NUMERIC: fsqrt.d f10, f1
17 # CHECK-NUMERIC: fsqrt.d f10, f2
22 # CHECK-NUMERIC: fsqrt.d f10, f3
27 # CHECK-NUMERIC: fsqrt.d f10, f4
32 # CHECK-NUMERIC: fsqrt.d f10, f5
37 # CHECK-NUMERIC: fsqrt.d f10, f6
42 # CHECK-NUMERIC: fsqrt.d f10, f7
57 # CHECK-NUMERIC: fsqrt.d f10, f10
58 # CHECK-NUMERIC-NEXT: fsqrt.d f10, f10
[all …]
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| H A D | attribute-with-insts.s | 22 fmadd.d f10, f11, f12, f13, dyn
25 fmadd.s f10, f11, f12, f13, dyn
|
| /llvm-project-15.0.7/flang/test/Semantics/ |
| H A D | resolve18.f90 | 141 interface f10 interface
142 function f10()
143 end function f10
144 end interface f10
147 function f10(x) function
148 end function f10
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| H A D | reduce01.f90 | 50 pure real function f10(x,y) function
53 f10 = x + y
82 b = reduce(a, f10)
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| H A D | call01.f90 | 76 character(*) :: f10 ! C723 local
77 f10 = ''
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | frame-04.ll | 16 ; CHECK: std %f10, 40(%r15)
24 ; CHECK: .cfi_offset %f10, -184
33 ; CHECK: ld %f10, 40(%r15)
76 ; CHECK: std %f10, 24(%r15)
82 ; CHECK: .cfi_offset %f10, -184
91 ; CHECK: ld %f10, 24(%r15)
122 ; numerical order so the pair should be %f8+%f10.
128 ; CHECK: std %f10, 0(%r15)
130 ; CHECK: .cfi_offset %f10, -176
139 ; CHECK: ld %f10, 0(%r15)
[all …]
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| H A D | anyregcc-novec.ll | 19 ;CHECK: std %f10,
33 …{r13},~{r14},~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f1…
45 ;CHECK-NEXT: std %f10,
62 %a10 = call double asm sideeffect "", "={f10}"() nounwind
69 …call void asm sideeffect "", "{f0},{f1},{f2},{f3},{f4},{f5},{f6},{f7},{f8},{f9},{f10},{f11},{f12},…
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| H A D | frame-07.ll | 17 ; CHECK-NOFP: stdy %f10, 4104(%r15)
25 ; CHECK-NOFP: .cfi_offset %f10, -184
34 ; CHECK-NOFP: ldy %f10, 4104(%r15)
51 ; CHECK-FP: stdy %f10, 4104(%r11)
60 ; CHECK-FP: ldy %f10, 4104(%r11)
138 ; CHECK-NOFP: std %f10, 8({{%r[1-5]}},%r15)
146 ; CHECK-NOFP: .cfi_offset %f10, -184
155 ; CHECK-NOFP: ld %f10, 8({{%r[1-5]}},%r15)
171 ; CHECK-FP: std %f10, 8({{%r[1-5]}},%r11)
179 ; CHECK-FP: .cfi_offset %f10, -184
[all …]
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| H A D | frame-02.ll | 15 ; CHECK: std %f10, 40(%r15)
23 ; CHECK: .cfi_offset %f10, -184
32 ; CHECK: ld %f10, 40(%r15)
99 ; CHECK: std %f10, 32(%r15)
106 ; CHECK: .cfi_offset %f10, -184
115 ; CHECK: ld %f10, 32(%r15)
178 ; CHECK-NOT: %f10
225 ; CHECK-NOT: %f10
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| H A D | frame-03.ll | 17 ; CHECK: std %f10, 40(%r15)
25 ; CHECK: .cfi_offset %f10, -184
34 ; CHECK: ld %f10, 40(%r15)
101 ; CHECK: std %f10, 32(%r15)
108 ; CHECK: .cfi_offset %f10, -184
117 ; CHECK: ld %f10, 32(%r15)
180 ; CHECK-NOT: %f10
227 ; CHECK-NOT: %f10
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| H A D | frame-17.ll | 13 ; CHECK: std %f10, 208(%r15)
26 ; CHECK: ld %f10, 208(%r15)
77 ; CHECK: std %f10, 208(%r15)
87 ; CHECK: ld %f10, 208(%r15)
138 ; CHECK: std %f10, 216(%r15)
150 ; CHECK: ld %f10, 216(%r15)
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| H A D | vector-constrained-fp-intrinsics.ll | 313 ; S390X-NEXT: ler %f10, %f0
317 ; S390X-NEXT: ler %f2, %f10
392 ; S390X-NEXT: ldr %f10, %f0
490 ; S390X-NEXT: ldr %f10, %f0
501 ; S390X-NEXT: ldr %f4, %f10
1341 ; S390X-NEXT: ler %f10, %f0
1345 ; S390X-NEXT: ler %f2, %f10
1424 ; S390X-NEXT: ldr %f0, %f10
1427 ; S390X-NEXT: ldr %f10, %f0
1524 ; S390X-NEXT: ldr %f10, %f0
[all …]
|
| /llvm-project-15.0.7/lld/test/ELF/ |
| H A D | arm-thunk-many-passes.s | 78 b.w f10
79 b.w f10
113 f10: bx lr label
|
| /llvm-project-15.0.7/lld/test/ELF/linkerscript/Inputs/ |
| H A D | arm-thunk-many-passes.s | 34 b.w f10
35 b.w f10
69 f10: bx lr label
|
| /llvm-project-15.0.7/clang/test/Sema/ |
| H A D | warn-unused-function.c | 37 static void f10(void); // expected-warning{{unused}}
38 static void f10(void);
|
| /llvm-project-15.0.7/clang/test/CodeGenCXX/ |
| H A D | mangle-variadic-templates.cpp | 74 template<typename ...T> void f10(ArrayOfN<T...> &) {} in f10() function
77 template void f10<int, float>(int (&)[2]);
|
| /llvm-project-15.0.7/clang/test/CXX/except/except.spec/ |
| H A D | p5-virtual.cpp | 38 virtual void f10() noexcept(false);
74 virtual void f10() noexcept(false);
|
| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | fpconv.ll | 114 define double @f10(i32 %a) {
115 ;CHECK-VFP-LABEL: f10:
117 ;CHECK-VFP-SP-LABEL: f10:
119 ;CHECK-LABEL: f10:
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/ |
| H A D | mips-reginfo-fp32.s | 29 # ceil.w.s - Reads $f8 and writes to $f10.
30 ceil.w.s $f10, $f8
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| /llvm-project-15.0.7/llvm/test/CodeGen/AVR/ |
| H A D | cmp.ll | 140 declare void @f10()
152 tail call void @f10()
168 tail call void @f10()
184 tail call void @f10()
200 tail call void @f10()
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| /llvm-project-15.0.7/clang/test/SemaObjCXX/ |
| H A D | arc-overloading.mm | 177 int &f10(__strong id *&); // expected-note 2{{not viable: no known conversion}} function
178 float &f10(__autoreleasing id *&); // expected-note 2{{not viable: no known conversion}} function
186 int &ir1 = f10(strong_id);
187 float &fr1 = f10(autoreleasing_id);
188 float &fr2 = f10(unsafe_id); // expected-error {{no match}}
189 float &fr2a = f10(weak_id); // expected-error {{no match}}
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| /llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/ |
| H A D | test-outerproduct-f32.mlir | 44 %f10 = arith.constant 10.0: f32
47 %v = call @vector_outerproduct_splat_8x8(%f1, %f2, %f10)
84 %9 = vector.insert %f10, %8[6] : f32 into !vector_type_R
|
| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | ppc64-fastcc.ll | 7 … %f8, <4 x i32> %v8, i64 %g9, double %f9, <4 x i32> %v9, i64 %g10, double %f10, <4 x i32> %v10, i6…
15 … %f8, <4 x i32> %v8, i64 %g9, double %f9, <4 x i32> %v9, i64 %g10, double %f10, <4 x i32> %v10, i6…
23 … %f8, <4 x i32> %v8, i64 %g9, double %f9, <4 x i32> %v9, i64 %g10, double %f10, <4 x i32> %v10, i6…
31 … %f8, <4 x i32> %v8, i64 %g9, double %f9, <4 x i32> %v9, i64 %g10, double %f10, <4 x i32> %v10, i6…
39 … %f8, <4 x i32> %v8, i64 %g9, double %f9, <4 x i32> %v9, i64 %g10, double %f10, <4 x i32> %v10, i6…
47 … %f8, <4 x i32> %v8, i64 %g9, double %f9, <4 x i32> %v9, i64 %g10, double %f10, <4 x i32> %v10, i6…
55 … %f8, <4 x i32> %v8, i64 %g9, double %f9, <4 x i32> %v9, i64 %g10, double %f10, <4 x i32> %v10, i6…
63 … %f8, <4 x i32> %v8, i64 %g9, double %f9, <4 x i32> %v9, i64 %g10, double %f10, <4 x i32> %v10, i6…
167 …f10(i64 %g1, double %f1, <4 x i32> %v1, i64 %g2, double %f2, <4 x i32> %v2, i64 %g3, double %f3, <…
168 ret double %f10
[all …]
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| /llvm-project-15.0.7/llvm/test/MC/SystemZ/ |
| H A D | regs-good.s | 68 #CHECK: ler %f10, %f11 # encoding: [0x38,0xab]
78 ler %f10,%f11
88 #CHECK: ldr %f10, %f11 # encoding: [0x28,0xab]
98 ldr %f10,%f11
205 #CHECK: .cfi_offset %f10, 208
271 .cfi_offset %f10,208
|