| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | dp-3source.ll | 37 %ext1 = sext i32 %val1 to i64 39 %prod = mul i64 %ext1, %ext2 47 %ext1 = sext i32 %val1 to i64 49 %prod = mul i64 %ext1, %ext2 57 %ext1 = zext i32 %val1 to i64 59 %prod = mul i64 %ext1, %ext2 69 %prod = mul i64 %ext1, %ext2 79 %res = mul i128 %ext1, %ext2 90 %res = mul i128 %ext1, %ext2 131 %res = mul i64 %ext1, %ext2 [all …]
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| H A D | sve-punpklo-combine.ll | 15 %ext1 = sext <vscale x 8 x i1> %extract to <vscale x 8 x i16> 34 %ext1 = sext <vscale x 8 x i1> %extract to <vscale x 8 x i16> 51 %ext1 = sext <vscale x 8 x i1> %extract to <vscale x 8 x i16> 68 %ext1 = sext <vscale x 4 x i1> %extract to <vscale x 4 x i32> 88 %ext1 = sext <vscale x 4 x i1> %extract to <vscale x 4 x i32> 106 %ext1 = sext <vscale x 4 x i1> %extract to <vscale x 4 x i32> 124 %ext1 = sext <vscale x 2 x i1> %extract to <vscale x 2 x i64> 145 %ext1 = sext <vscale x 2 x i1> %extract to <vscale x 2 x i64> 164 %ext1 = sext <vscale x 2 x i1> %extract to <vscale x 2 x i64> 183 %ext1 = sext <vscale x 8 x i1> %extract to <vscale x 8 x i16> [all …]
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| H A D | arm64-vsub.ll | 163 %ext1 = sext <8 x i8> %high1 to <8 x i16> 169 %res = sub <8 x i16> %ext1, %ext2 178 %ext1 = sext <4 x i16> %high1 to <4 x i32> 184 %res = sub <4 x i32> %ext1, %ext2 199 %res = sub <2 x i64> %ext1, %ext2 241 %ext1 = zext <8 x i8> %high1 to <8 x i16> 247 %res = sub <8 x i16> %ext1, %ext2 256 %ext1 = zext <4 x i16> %high1 to <4 x i32> 262 %res = sub <4 x i32> %ext1, %ext2 271 %ext1 = zext <2 x i32> %high1 to <2 x i64> [all …]
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| H A D | arm64-aapcs.ll | 31 ; CHECK-DAG: ldr w[[ext1:[0-9]+]], [sp, #24] 51 ; CHECK: str x[[ext1]], [{{x[0-9]+}}, :lo12:var64]
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| H A D | hadd-combine.ll | 74 …%ext1 = zext <8 x i16> <i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 6553… 76 %add = add <8 x i32> %ext1, %ext2 240 …%ext1 = sext <8 x i16> <i16 32766, i16 32766, i16 32766, i16 32766, i16 32766, i16 32766, i16 3276… 242 %add = add <8 x i32> %ext1, %ext2 409 …%ext1 = zext <8 x i16> <i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 6553… 411 %add1 = add <8 x i32> %ext1, %ext2 578 …%ext1 = sext <8 x i16> <i16 32766, i16 32766, i16 32766, i16 32766, i16 32766, i16 32766, i16 3276… 580 %add1 = add <8 x i32> %ext1, %ext2
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| /llvm-project-15.0.7/flang/test/Semantics/ |
| H A D | symbol15.f90 | 33 procedure(iface), pointer :: pp3 => ext1 69 procedure(iface), nopass, pointer :: ppc3 => ext1 120 procedure(iface), nopass, pointer :: ppc3 => ext1 154 external :: ext1 172 procedure(iface), pointer :: pp10 => ext1 188 procedure(iface), nopass, pointer :: ppc10 => ext1 216 procedure(iface), nopass, pointer :: ppc10 => ext1
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| /llvm-project-15.0.7/llvm/test/Transforms/Inline/ |
| H A D | prof-update-sample-alwaysinline.ll | 5 declare void @ext1(); 13 ; ext1 is optimized away, thus not updated. 14 ; CHECK: call void @ext1(), !prof ![[COUNT_CALLEE1:[0-9]*]] 15 call void @ext1(), !prof !16
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| H A D | prof-update-sample.ll | 6 declare void @ext1(); 14 ; ext1 is optimized away, thus not updated. 15 ; CHECK: call void @ext1(), !prof ![[COUNT_CALLEE1:[0-9]*]] 16 call void @ext1(), !prof !16
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | vec_extract-avx.ll | 25 %ext1 = extractelement <8 x float> %v, i32 1 29 %ins1 = insertelement <4 x float> %ins0, float %ext1, i32 1 51 %ext1 = extractelement <8 x float> %v, i32 5 55 %ins1 = insertelement <4 x float> %ins0, float %ext1, i32 1 79 %ext1 = extractelement <8 x i32> %v, i32 5 83 %ins1 = insertelement <4 x i32> %ins0, i32 %ext1, i32 1 105 %ext1 = extractelement <4 x double> %v, i32 3 107 %ins1 = insertelement <2 x double> %ins0, double %ext1, i32 1
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| H A D | clear_upper_vector_element_bits.ll | 33 %ext1 = zext i32 %trunc1 to i64 35 %v1 = insertelement <2 x i64> %v0, i64 %ext1, i32 1 68 %ext1 = zext i32 %trunc1 to i64 72 %v1 = insertelement <4 x i64> %v0, i64 %ext1, i32 1 104 %ext1 = zext i16 %trunc1 to i32 108 %v1 = insertelement <4 x i32> %v0, i32 %ext1, i32 1 156 %ext1 = zext i16 %trunc1 to i32 201 %ext1 = zext i8 %trunc1 to i16 264 %ext1 = zext i8 %trunc1 to i16 341 %ext1 = zext i4 %trunc1 to i8 [all …]
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| /llvm-project-15.0.7/llvm/test/tools/llvm-objdump/ELF/ARM/ |
| H A D | unknown-instr.test | 9 ## clang -march=..+ext1+ext2 13 ## llvm-objdump --mattr=+ext1
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | vec-shift-07.ll | 150 %ext1 = sext i8 %elt1 to i64 152 %vec1 = insertelement <2 x i64> %vec0, i64 %ext1, i32 1 164 %ext1 = sext i16 %elt1 to i64 166 %vec1 = insertelement <2 x i64> %vec0, i64 %ext1, i32 1 178 %ext1 = sext i32 %elt1 to i64 180 %vec1 = insertelement <2 x i64> %vec0, i64 %ext1, i32 1
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| H A D | branch-06.ll | 162 %ext1 = zext i8 %byte1 to i32 164 %cond = icmp ult i32 %ext1, %ext2 184 %ext1 = zext i16 %half1 to i32 186 %cond = icmp ult i32 %ext1, %ext2
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| H A D | asm-18.ll | 70 %ext1 = sext i8 %val1 to i32 75 "h,r,h,r"(i32 %ext1, i32 %ext2, i32 %ext3, i32 %ext4) 94 %ext1 = sext i16 %val1 to i32 99 "h,r,h,r"(i32 %ext1, i32 %ext2, i32 %ext3, i32 %ext4) 118 %ext1 = zext i8 %val1 to i32 123 "h,r,h,r"(i32 %ext1, i32 %ext2, i32 %ext3, i32 %ext4) 142 %ext1 = zext i16 %val1 to i32 147 "h,r,h,r"(i32 %ext1, i32 %ext2, i32 %ext3, i32 %ext4) 207 %ext1 = zext i8 %val1 to i32 209 %val3 = call i8 asm sideeffect "stepa $0, $1", "=h,0,r"(i32 %ext1, i32 %ext2) [all …]
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| H A D | int-sub-02.ll | 158 %ext1 = sext i32 %frob1 to i64 169 %sub1 = sub i64 %sub0, %ext1
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| H A D | int-sub-03.ll | 158 %ext1 = zext i32 %frob1 to i64 169 %sub1 = sub i64 %sub0, %ext1
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| H A D | int-mul-03.ll | 158 %ext1 = sext i32 %frob1 to i64 169 %mul1 = mul i64 %mul0, %ext1
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| H A D | int-add-03.ll | 158 %ext1 = sext i32 %frob1 to i64 169 %add1 = add i64 %add0, %ext1
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| H A D | int-add-04.ll | 158 %ext1 = zext i32 %frob1 to i64 169 %add1 = add i64 %add0, %ext1
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| /llvm-project-15.0.7/llvm/test/Transforms/GVNSink/ |
| H A D | indirect-call.ll | 49 define zeroext i1 @test3(i1 zeroext %flag, i32 %blksA, i32 %blksB, i32 %nblks, i8(i1)* %ext1, i8(i1… 55 ; CHECK: %[[x:.*]] = select i1 %flag, i8 (i1)* %ext1, i8 (i1)* %ext2 59 %frombool1 = call i8 %ext1(i1 %cmp)
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| /llvm-project-15.0.7/mlir/test/Dialect/Arithmetic/ |
| H A D | canonicalize.mlir | 189 %ext1 = arith.extui %arg0 : i1 to i8 190 %ext2 = arith.extsi %ext1 : i8 to i64 198 %ext1 = arith.extui %arg0 : i1 to i8 199 %ext2 = arith.extui %ext1 : i8 to i64 207 %ext1 = arith.extsi %arg0 : i1 to i8 208 %ext2 = arith.extsi %ext1 : i8 to i64 219 %ext1 = arith.extsi %arg1 : i8 to i64 263 %res = arith.andi %ext0, %ext1 : i64 274 %res = arith.andi %ext0, %ext1 : i64 285 %res = arith.ori %ext0, %ext1 : i64 [all …]
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| /llvm-project-15.0.7/llvm/test/DebugInfo/X86/ |
| H A D | location-range-inlined-xblock.mir | 7 ## int ext1(int); 15 ## r = ext1(local); 111 …!41 = !DISubprogram(name: "ext1", linkageName: "_Z4ext1i", scope: !3, file: !3, line: 2, type: !12…
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| /llvm-project-15.0.7/llvm/test/Transforms/SROA/ |
| H A D | big-endian.ll | 29 ; CHECK-NEXT: %[[ext1:.*]] = zext i8 0 to i24 30 ; CHECK-NEXT: %[[shift1:.*]] = shl i24 %[[ext1]], 8 87 ; CHECK: %[[ext1:.*]] = zext i8 1 to i40 89 ; CHECK-NEXT: %[[insert1:.*]] = or i40 %[[mask1]], %[[ext1]]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/ |
| H A D | opt-fold-ext-tbz-tbnz.mir | 97 %ext1:gpr(s32) = G_ZEXT %copy(s16) 98 %ext2:gpr(s64) = G_ANYEXT %ext1(s32)
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| /llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/ |
| H A D | iv-widen-elim-ext.ll | 340 %idx.ext1 = sext i32 %mul1 to i64 341 %add.ptr1 = getelementptr inbounds i32, i32* %in, i64 %idx.ext1 414 %idx.ext1 = sext i32 %mul1 to i64 415 %add.ptr1 = getelementptr inbounds i32, i32* %in, i64 %idx.ext1 459 %idx.ext1 = zext i32 %mul1 to i64 460 %add.ptr1 = getelementptr inbounds i32, i32* %in, i64 %idx.ext1
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