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Searched refs:emitLogicalOp (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp197 unsigned emitLogicalOp(unsigned ISDOpc, MVT RetVT, const Value *LHS,
291 unsigned MipsFastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT, in emitLogicalOp() function in MipsFastISel
866 ResultReg = emitLogicalOp(ISD::AND, VT, I->getOperand(0), I->getOperand(1)); in selectLogicalOp()
869 ResultReg = emitLogicalOp(ISD::OR, VT, I->getOperand(0), I->getOperand(1)); in selectLogicalOp()
872 ResultReg = emitLogicalOp(ISD::XOR, VT, I->getOperand(0), I->getOperand(1)); in selectLogicalOp()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp246 unsigned emitLogicalOp(unsigned ISDOpc, MVT RetVT, const Value *LHS,
1563 unsigned AArch64FastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT, in emitLogicalOp() function in AArch64FastISel
1909 ResultReg = emitLogicalOp(ISD::AND, VT, I->getOperand(0), I->getOperand(1)); in selectLogicalOp()
1912 ResultReg = emitLogicalOp(ISD::OR, VT, I->getOperand(0), I->getOperand(1)); in selectLogicalOp()
1915 ResultReg = emitLogicalOp(ISD::XOR, VT, I->getOperand(0), I->getOperand(1)); in selectLogicalOp()