Searched refs:emitLoad (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64LowerHomogeneousPrologEpilog.cpp | 220 static void emitLoad(MachineFunction &MF, MachineBasicBlock &MBB, in emitLoad() function
334 emitLoad(MF, MBB, MBB.end(), TII, Regs[I], Regs[I + 1], Size - I - 2, in getOrCreateFrameHelper()
337 emitLoad(MF, MBB, MBB.end(), TII, Regs[Size - 2], Regs[Size - 1], Size, in getOrCreateFrameHelper()
471 emitLoad(MF, MBB, MBBI, *TII, Regs[I], Regs[I + 1], Size - I - 2, false); in lowerEpilog()
473 emitLoad(MF, MBB, MBBI, *TII, Regs[Size - 2], Regs[Size - 1], Size, true); in lowerEpilog()
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| H A D | AArch64FastISel.cpp | 226 unsigned emitLoad(MVT VT, MVT ResultVT, Address Addr, bool WantZExt = true,
1733 unsigned AArch64FastISel::emitLoad(MVT VT, MVT RetVT, Address Addr, in emitLoad() function in AArch64FastISel
1974 emitLoad(VT, RetVT, Addr, WantZExt, createMachineMemOperandFor(I)); in selectLoad()
3304 unsigned ResultReg = emitLoad(VT, VT, Src); in tryEmitSmallMemCpy()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 181 bool emitLoad(MVT VT, unsigned &ResultReg, Address &Addr);
752 bool MipsFastISel::emitLoad(MVT VT, unsigned &ResultReg, Address &Addr) { in emitLoad() function in MipsFastISel
899 if (!emitLoad(VT, ResultReg, Addr)) in selectLoad()
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