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/llvm-project-15.0.7/llvm/test/DebugInfo/MIR/InstrRef/
H A Dphi-through-regalloc.mir15 # int either = 0;
17 # either = bar;
19 # either = baz;
21 # return either;
45 %either.0 = phi i32 [ %baz, %if.else ], [ %bar, %entry ], !dbg !18
46 …call void @llvm.dbg.value(metadata i32 %either.0, metadata !14, metadata !DIExpression()), !dbg !12
47 ret i32 %either.0, !dbg !19
73 !14 = !DILocalVariable(name: "either", scope: !7, file: !1, line: 3, type: !10)
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Ddiscrim-union.cpp67 class either { class
74 constexpr either(a<U> &&t) : in either() function in either
101 typedef either<int, char, double> icd;
114 constexpr either<const icd*, non_triv> icd4 = a<const icd*>(&icd2);
115 constexpr either<const icd*, non_triv> icd5 = a<non_triv>();
/llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/
H A Dtrip-count14.ll8 ; CHECK-NEXT: Loop %do.body: max backedge-taken count is 1, actual taken count either this or zero.
23 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or 1 times
33 ; CHECK-NEXT: Loop %do.body: max backedge-taken count is 2, actual taken count either this or zero.
48 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or 2 times
73 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or x times
104 br i1 %cmp1, label %do.body, label %do.end ; taken either 0 or 2 times
114 ; CHECK-NEXT: Loop %do.body: max backedge-taken count is 1, actual taken count either this or zero.
129 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or 1 times
154 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or 2 times
179 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or x times
[all …]
H A Dtrip-count13.ll17 ; CHECK-NEXT: Loop %loop: max backedge-taken count is -100, actual taken count either this or zero.
37 ; CHECK-NEXT: Loop %loop: max backedge-taken count is -100, actual taken count either this or zero.
57 ; CHECK-NEXT: Loop %loop: max backedge-taken count is -100, actual taken count either this or zero.
77 ; CHECK-NEXT: Loop %loop: max backedge-taken count is -100, actual taken count either this or zero.
/llvm-project-15.0.7/llvm/test/MachineVerifier/
H A Dtest_g_shift.mir13 ; CHECK: Shifts and rotates require operands to be either all scalars or all vectors
16 ; CHECK: Shifts and rotates require operands to be either all scalars or all vectors
19 ; CHECK: Shifts and rotates require operands to be either all scalars or all vectors
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dselect-or.ll51 declare signext i32 @either() nounwind
62 ; RV32I-NEXT: call either@plt
78 ; RV32IBT-NEXT: call either@plt
94 ; RV64I-NEXT: call either@plt
110 ; RV64IBT-NEXT: call either@plt
122 %2 = tail call i32 @either()
/llvm-project-15.0.7/mlir/include/mlir/IR/
H A DPatternBase.td109 // This delta value can be either positive or negative.
199 // Directive used to specify the operands may be matched in either order. When
200 // two adjacents are marked with `either`, it'll try to match the operands in
201 // either ordering of constraints. Example:
204 // (TwoArgOp (either $firstArg, (AnOp $secondArg)))
206 // The above pattern will accept either `"test.TwoArgOp"(%I32Arg, %AnOpArg)` and
209 // Only operand is supported with `either` and note that an operation with
211 // `either` while pattern matching.
212 def either;
/llvm-project-15.0.7/clang/test/SemaTemplate/
H A Dinstantiate-expanded-type-constraint.cpp14 concept either = (is_same_v<T, Us> || ...);
26 template<either<Ts, Us...>... Vs>
/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A Dgfx10_soffset_d01a5c.rst13 An unsigned offset from the base address. My be specified as either a register or a 20-bit immediat…
15 Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` op…
H A Dgfx1030_soffset_d01a5c.rst13 An unsigned offset from the base address. My be specified as either a register or a 20-bit immediat…
15 Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` op…
H A Dgfx90a_soffset_ba92ce.rst13 An unsigned offset from the base address. My be specified as either a register or a 20-bit immediat…
15 Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` op…
H A Dgfx9_soffset_ba92ce.rst13 An unsigned offset from the base address. My be specified as either a register or a 20-bit immediat…
15 Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` op…
H A Dgfx940_soffset_ba92ce.rst13 An unsigned offset from the base address. My be specified as either a register or a 20-bit immediat…
15 Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` op…
/llvm-project-15.0.7/mlir/test/IR/
H A Dinvalid-affinemap.mlir83 …{{non-affine expression: at least one of the multiply operands has to be either a constant or symb…
86 …{{non-affine expression: at least one of the multiply operands has to be either a constant or symb…
89 …ected-error {{non-affine expression: right operand of floordiv has to be either a constant or symb…
92 …pected-error {{non-affine expression: right operand of ceildiv has to be either a constant or symb…
95 …/ expected-error {{non-affine expression: right operand of mod has to be either a constant or symb…
/llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/
H A Dfull-unroll-keep-first-exit.ll35 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or 1 times
74 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or 2 times
107 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or x times
147 br i1 %cmp1, label %do.body, label %do.end ; taken either 0 or 2 times
183 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or 1 times
222 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or 2 times
255 br i1 %cmp, label %do.body, label %do.end ; taken either 0 or x times
295 br i1 %cmp1, label %do.body, label %do.end ; taken either 0 or 2 times
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Di1-contents.ll7 ; AAPCS: low 8 bits of %in (== w0) will be either 0 or 1. Need to extend to
18 ; AAPCS: low 8 bits of %val1 (== w0) will be either 0 or 1. Need to extend to
31 ; AAPCS: low 8 bits of w0 must be either 0 or 1. Need to mask them off.
/llvm-project-15.0.7/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/
H A Dinterleaved-mayalias-store.ll6 ; This is NOT OK to vectorize, as either load may alias either store.
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMCallingConv.td32 // Handle all vector types as either f64 or v2f64.
58 // Handle all vector types as either f64 or v2f64.
73 // Handle all vector types as either f64 or v2f64.
93 // Handle all vector types as either f64 or v2f64.
110 // Handle all vector types as either f64 or v2f64.
167 // Handle all vector types as either f64 or v2f64.
185 // Handle all vector types as either f64 or v2f64.
212 // Handle all vector types as either f64 or v2f64.
235 // Handle all vector types as either f64 or v2f64.
/llvm-project-15.0.7/third-party/benchmark/docs/
H A Dtools.md32 Where `<benchmark_baseline>` and `<benchmark_contender>` either specify a benchmark executable file…
34 … benchmarks invocations. They can be anything that binary accepts, be it either normal `--benchmar…
95 Where `<benchmark>` either specify a benchmark executable file, or a JSON output file. The type of …
99 … benchmarks invocations. They can be anything that binary accepts, be it either normal `--benchmar…
146 Where `<benchmark_baseline>` and `<benchmark_contender>` either specify a benchmark executable file…
150 … benchmarks invocations. They can be anything that binary accepts, be it either normal `--benchmar…
/llvm-project-15.0.7/llvm/docs/
H A DAMDGPUModifierSyntax.rst1125 Each value may be specified as either
1197 Note: numeric values may be specified as either
1235 Note: numeric values may be specified as either
1276 Note: numeric values may be specified as either
1306 Note: numeric values may be specified as either
1579 Note: numeric values may be specified as either
1608 Note: numeric values may be specified as either
1787 Note: numeric values may be specified as either
2023 Note: numeric value may be specified as either
2040 Note: numeric value may be specified as either
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Dialect/ArmNeon/
H A DArmNeon.td86 // Supports either:
114 // Supports either:
154 The two input vectors `b` and `c` have a 2D shape, consisting of either 2
164 // Supports either:
/llvm-project-15.0.7/llvm/test/Bitcode/
H A Dmdnodes-in-post-order.ll5 ; the entry node, !6, as well as from !5. There is one leaf on either side to
21 ; The leafs should come first (in either order).
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Quant/
H A DQuantOpsBase.td41 // A primitive type that can represent a real value. This is either a
47 // A primitive type that can represent a storage value. This is either an
/llvm-project-15.0.7/clang/test/Analysis/
H A Dnumber-object-conversion.m13 …ointer value of type 'NSNumber *' to a primitive boolean value; instead, either compare the pointe…
14 …ointer value of type 'NSNumber *' to a primitive boolean value; instead, either compare the pointe…
15 …ointer value of type 'NSNumber *' to a primitive boolean value; instead, either compare the pointe…
16 …a pointer value of type 'NSNumber *' to a scalar integer value; instead, either compare the pointe…
92 …a pointer value of type 'NSNumber *' to a scalar integer value; instead, either compare the pointe…
/llvm-project-15.0.7/llvm/utils/lit/tests/Inputs/shtest-not/
H A Dnot-calls-fail2.txt1 # Check that "not not" either returns 0 or 1, even if the original

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