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/llvm-project-15.0.7/llvm/test/MC/SystemZ/
H A Ddirective-insn-vector.s6 #CHECK: e7 23 2f ff 10 13 vgef %v2, 4095(%v3,%r2), 1
9 #CHECK: e7 56 ff f1 20 4a vftci %v5, %v6, 4095, 2, 1
12 #CHECK: e7 20 2f ff 30 06 vl %v2, 4095(%r2), 3
15 #CHECK: e7 16 00 01 00 21 vlgvb %r1, %v6, 1
17 #CHECK: e7 16 00 00 30 21 vlgvg %r1, %v6, 0
20 #CHECK: e7 37 00 00 00 56 vlr %v3, %v7
22 #CHECK: e7 37 60 18 30 eb wfchdbs %f3, %f7, %f6
28 #CHECK: e7 01 00 00 0c 56 vlr %v16, %v17
H A Dreloc-absolute.s13 # CHECK-REL: e7 00 00 04 00 06 vl %v0, 4
19 # CHECK-REL: e7 00 10 04 00 06 vl %v0, 4(%r1)
25 # CHECK-REL: e7 00 10 04 30 06 vl %v0, 4(%r1), 3
69 # CHECK-REL: e7 22 30 04 30 06 vl %v2, 4(%r2,%r3), 3
201 # CHECK-REL: e7 00 10 04 00 12 vgeg %v0, 4(%v0,%r1), 0
/llvm-project-15.0.7/llvm/test/TableGen/
H A DSetTheory.td143 def e7;
146 def E : Set<(add e0, e1, e2, e3, e4, e5, e6, e7, e8, e9)>;
155 // CHECK: S8d = [ e1 e3 e5 e7 e9 ]
156 // CHECK: S8e = [ e0 e2 e4 e6 e8 e1 e3 e5 e7 e9 ]
165 // CHECK: S9a = [ e3 e4 e5 e6 e7 ]
166 // CHECK: S9b = [ e7 e6 e5 e4 e3 ]
168 // CHECK: S9d = [ a b c d e0 e3 e6 e9 e4 e5 e7 ]
175 // CHECK: T0a = [ e3 e7 e4 e6 e5 ]
176 // CHECK: T0b = [ e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ]
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dpr12251.cpp58 enum e7 { e7_a = -16, e7_b = 2}; enum
59 e7 g7(e7 *x) { in g7()
/llvm-project-15.0.7/lld/test/ELF/
H A Driscv-call.s11 # CHECK-NEXT: e7 80 80 00 jalr 8(ra)
13 # CHECK-NEXT: e7 80 80 ff jalr -8(ra)
20 # LIMITS-NEXT: e7 80 f0 7f jalr 2047(ra)
22 # LIMITS-NEXT: e7 80 00 80 jalr -2048(ra)
/llvm-project-15.0.7/compiler-rt/test/ubsan/TestCases/Misc/
H A Denum.cpp19 EMinus e7 = static_cast<EMinus>(2); in main() local
31 ((int)e7 == 2); in main()
/llvm-project-15.0.7/clang/test/Sema/
H A Dno-documentation-warn-tagdecl-specifier.c80 enum e7;
81 enum e7* g7(void);
/llvm-project-15.0.7/polly/lib/External/isl/test_inputs/codegen/
H A Dstride6.in1 …e7 = [(-1 + niter - o4)/32]: 32e0 = o0 and 32e1 = o1 and 32e2 = o2 and 32e3 = o3 and 32e4 = -31i +…
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-fml-combines.ll33 %e7 = insertelement <2 x double> undef, double %mul, i32 0
34 %e8 = insertelement <2 x double> %e7, double %mul, i32 1
76 %e7 = insertelement <2 x float> undef, float %mul, i32 0
77 %e8 = insertelement <2 x float> %e7, float %mul, i32 1
118 %e7 = insertelement <4 x float> undef, float %mul, i32 0
119 %e8 = insertelement <4 x float> %e7, float %mul, i32 1
H A Darm64-fma-combines.ll40 %e7 = insertelement <2 x double> undef, double %mul, i32 0
41 %e8 = insertelement <2 x double> %e7, double %mul, i32 1
83 %e7 = insertelement <2 x float> undef, float %mul, i32 0
84 %e8 = insertelement <2 x float> %e7, float %mul, i32 1
125 %e7 = insertelement <4 x float> undef, float %mul, i32 0
126 %e8 = insertelement <4 x float> %e7, float %mul, i32 1
H A Dshuffle-tbl34.ll582 %e7 = extractelement <16 x i8> %d, i32 8
590 %i7 = insertelement <8 x i8> %i6, i8 %e7, i32 6
650 %e7 = extractelement <16 x i8> %d, i32 8
666 %i7 = insertelement <16 x i8> %i6, i8 %e7, i32 6
/llvm-project-15.0.7/clang/test/CodeGen/
H A D2007-04-11-PR1321.c11 unsigned int e7 : 17; member
/llvm-project-15.0.7/llvm/test/tools/llvm-objdump/MachO/ARM/
H A Dnomcpu-armv7s.test3 @ CHECK: 10 f0 10 e7 sdiv r0, r0, r0
/llvm-project-15.0.7/clang/test/CodeGen/X86/
H A Dx86_32-arguments-darwin.c37 typedef enum { A, B, C } e7; typedef
38 void f7(e7 a0) {} in f7()
H A Dx86_64-arguments.c44 typedef enum { A, B, C } e7; typedef
45 void f7(e7 a0) { in f7()
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/
H A Dtest-expand.mlir91 %e7 = call @expand16_at8(%A, %some1, %pass)
93 vector.print %e7 : vector<16xf32>
/llvm-project-15.0.7/llvm/test/tools/llvm-profgen/
H A Dcallback-external-addr.test49 ; CHECK-UNWINDER: 6d0-6e7:5
54 ; CHECK-UNWINDER: 6e7->6b0:6
/llvm-project-15.0.7/llvm/test/tools/llvm-objdump/ELF/ARM/
H A Dv7a-neg-subfeature.s37 @CHECK-NOT: 11 f2 30 e7 udiv r0, r1, r2
/llvm-project-15.0.7/llvm/test/Transforms/NaryReassociate/
H A Dnary-req.ll61 %e7 = sub i64 undef, 0
63 %e9 = call i64 @llvm.umin.i64(i64 %e7, i64 %e8)
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/modernize/
H A Duse-trailing-return-type.cpp187 int (std::vector<std::string>::*e7())(double);
/llvm-project-15.0.7/llvm/test/DebugInfo/CSKY/
H A Ddwarf-csky-relocs.ll93 …-protector-buffer-size"="8" "target-cpu"="ck810" "target-features"="+2e3,+3e7,+7e10,+cache,+dsp1e2…
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DCSKYTargetParser.def131 CSKY_ARCH_EXT_NAME("3e7", CSKY::AEK_3E7, "+3e7", "-3e7")
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKY.td311 def Has3E7 : SubtargetFeature<"3e7", "Has3E7", "true",
312 "Support CSKY 3e7 instructions", [Has2E3]>;
315 "Support CSKY 3e7 instructions">;
/llvm-project-15.0.7/llvm/test/MC/Hexagon/
H A Dv60-vmem.s90 #CHECK: 2830e2e7 { vmemu(r16+#-6) = v7 }
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/AArch64/
H A Dsve-intrinsic-opts-lasta-lastb.ll107 %e7 = tail call i8 @llvm.aarch64.sve.lastb.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %v)
108 ret i8 %e7

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