| /llvm-project-15.0.7/clang/test/Frontend/ |
| H A D | optimization-remark-options.c | 17 void foo2(int *dw, int *uw, int *A, int *B, int *C, int *D, int N) { in foo2() argument 19 dw[i] = A[i] + B[i - 1] + C[i - 2] + D[i - 3]; in foo2()
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| /llvm-project-15.0.7/compiler-rt/lib/profile/ |
| H A D | WindowsMMap.c | 138 DWORD dw = GetLastError(); in lock() local 141 if (!blocking && dw == ERROR_LOCK_VIOLATION) in lock() 146 if (dw != ERROR_IO_PENDING) in lock()
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| /llvm-project-15.0.7/llvm/test/MC/COFF/ |
| H A D | global_ctors_dtors.ll | 59 ; MINGW32: .section .ctors,"dw" 61 ; MINGW32: .section .ctors,"dw",associative,{{_?}}b 64 ; MINGW32: .section .dtors,"dw"
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| /llvm-project-15.0.7/clang/test/CodeGenObjC/ |
| H A D | misc-atomic-property.m | 47 dword dw; field 54 @synthesize dword_p=dw;
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | mingw-comdats.ll | 60 ; CHECK: .section .data,"dw",discard,gv 66 ; GNU: .section .data$gv,"dw",discard,gv 72 ; GNU32: .section .data$gv,"dw",discard,_gv
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| H A D | constructor.ll | 80 ; COFF-CTOR: .section .ctors.65520,"dw",associative,v 83 ; COFF-CTOR-NEXT: .section .ctors.09980,"dw",associative,v 86 ; COFF-CTOR-NEXT: .section .ctors,"dw"
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| H A D | pr37499.ll | 42 …%1 = tail call <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512(<16 x i32> %x, <16 x i16> <i16 1, i16 … 49 declare <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512(<16 x i32>, <16 x i16>, i16)
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| H A D | coff-exclude.ll | 7 ; CHECK-DAG: .section aaa,"dw"
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| H A D | mingw-comdats-xdata.ll | 60 ; GNU: .section .data$gv,"dw",discard,gv
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| H A D | avx512vl-intrinsics.ll | 3064 declare <8 x i16> @llvm.x86.avx512.mask.pmov.dw.128(<4 x i32>, <8 x i16>, i8) 3095 declare void @llvm.x86.avx512.mask.pmov.dw.mem.128(ptr %ptr, <4 x i32>, i8) 3118 declare <8 x i16> @llvm.x86.avx512.mask.pmovs.dw.128(<4 x i32>, <8 x i16>, i8) 3149 declare void @llvm.x86.avx512.mask.pmovs.dw.mem.128(ptr %ptr, <4 x i32>, i8) 3172 declare <8 x i16> @llvm.x86.avx512.mask.pmovus.dw.128(<4 x i32>, <8 x i16>, i8) 3203 declare void @llvm.x86.avx512.mask.pmovus.dw.mem.128(ptr %ptr, <4 x i32>, i8) 3226 declare <8 x i16> @llvm.x86.avx512.mask.pmov.dw.256(<8 x i32>, <8 x i16>, i8) 3259 declare void @llvm.x86.avx512.mask.pmov.dw.mem.256(ptr %ptr, <8 x i32>, i8) 3284 declare <8 x i16> @llvm.x86.avx512.mask.pmovs.dw.256(<8 x i32>, <8 x i16>, i8) 3317 declare void @llvm.x86.avx512.mask.pmovs.dw.mem.256(ptr %ptr, <8 x i32>, i8) [all …]
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| H A D | avx512-intrinsics.ll | 3949 declare <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512(<16 x i32>, <16 x i16>, i16) 3979 declare void @llvm.x86.avx512.mask.pmov.dw.mem.512(ptr %ptr, <16 x i32>, i16) 3998 call void @llvm.x86.avx512.mask.pmov.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 -1) 3999 call void @llvm.x86.avx512.mask.pmov.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 %x2) 4003 declare <16 x i16> @llvm.x86.avx512.mask.pmovs.dw.512(<16 x i32>, <16 x i16>, i16) 4033 declare void @llvm.x86.avx512.mask.pmovs.dw.mem.512(ptr %ptr, <16 x i32>, i16) 4052 call void @llvm.x86.avx512.mask.pmovs.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 -1) 4053 call void @llvm.x86.avx512.mask.pmovs.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 %x2) 4057 declare <16 x i16> @llvm.x86.avx512.mask.pmovus.dw.512(<16 x i32>, <16 x i16>, i16) 4087 declare void @llvm.x86.avx512.mask.pmovus.dw.mem.512(ptr %ptr, <16 x i32>, i16) [all …]
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| H A D | stack-folding-int-avx512vl.ll | 2156 %1 = call <8 x i16> @llvm.x86.avx512.mask.pmov.dw.256(<8 x i32> %a0, <8 x i16> undef, i8 -1) 2160 declare <8 x i16> @llvm.x86.avx512.mask.pmov.dw.256(<8 x i32>, <8 x i16>, i8) 2204 %1 = call <8 x i16> @llvm.x86.avx512.mask.pmovs.dw.256(<8 x i32> %a0, <8 x i16> undef, i8 -1) 2208 declare <8 x i16> @llvm.x86.avx512.mask.pmovs.dw.256(<8 x i32>, <8 x i16>, i8) 2429 %1 = call <8 x i16> @llvm.x86.avx512.mask.pmovus.dw.256(<8 x i32> %a0, <8 x i16> undef, i8 -1) 2433 declare <8 x i16> @llvm.x86.avx512.mask.pmovus.dw.256(<8 x i32>, <8 x i16>, i8)
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| H A D | stack-folding-int-avx512.ll | 4736 %1 = call <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512(<16 x i32> %a0, <16 x i16> undef, i16 -1) 4740 declare <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512(<16 x i32>, <16 x i16>, i16) 4832 %1 = call <16 x i16> @llvm.x86.avx512.mask.pmovs.dw.512(<16 x i32> %a0, <16 x i16> undef, i16 -1) 4836 declare <16 x i16> @llvm.x86.avx512.mask.pmovs.dw.512(<16 x i32>, <16 x i16>, i16) 5028 %1 = call <16 x i16> @llvm.x86.avx512.mask.pmovus.dw.512(<16 x i32> %a0, <16 x i16> undef, i16 -1) 5032 declare <16 x i16> @llvm.x86.avx512.mask.pmovus.dw.512(<16 x i32>, <16 x i16>, i16)
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | carry.ll | 36 %dw = add i64 %ch, %bw 37 ret i64 %dw
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/Windows/ |
| H A D | structors.ll | 17 ; CHECK-GNU: .section .ctors,"dw"
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | README.txt | 235 void func(unsigned int *ret, float dx, float dy, float dz, float dw) { 237 if(dx < -dw) code |= 1; 238 if(dx > dw) code |= 2; 239 if(dy < -dw) code |= 4; 240 if(dy > dw) code |= 8; 241 if(dz < -dw) code |= 16; 242 if(dz > dw) code |= 32;
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| H A D | PPC.td | 241 "Enable the popcnt[dw] instructions">; 242 // Note that for the a2 processor models we should not use popcnt[dw] by 247 "Has slow popcnt[dw] instructions">;
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| H A D | README_P9.txt | 382 - Provide testing for cnttz[dw] 575 Atomic operations (l[dw]at, st[dw]at):
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsScheduleGeneric.td | 571 // s[bhw], sc, s[dw]c[23] 687 // l[dw][lr] 818 // nmadd.d, nmsub.d, mul.[ds], mul.ps, ceil.[wl].[sd], cvt.d.[sw], cvt.s.[dw], 823 // cvt.s.[dw], cvt.w.[sd], cvt.[sw].ps, round.[lw].[ds], floor.[lw].ds, 893 // l[dw]x?c1 1586 // fadd.[dw], fmadd.[dw], fmul.[dw], frcp.[dw], frsqrt.[dw], fsqrt.[dw] 1587 // fsub.[dw], fdiv.[dw]
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| H A D | MipsScheduleP5600.td | 448 // add.[ds], add.ps, cvt.d.[sw], cvt.s.[dw], cvt.w.[sd], cvt.[sw].ps, 588 // l[dw]x?c1, ld.[bhwd]
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | MIMGInstructions.td | 949 class MIMGAddrSize<int dw, bit enable_disasm> { 950 int NumWords = dw; 989 !foreach(dw, !if(sample.Gradients, 996 !add(dw, !size(sample.ExtraAddrArgs))); 1009 lhs, dw, 1010 !if(isRangeInList<dw.Min, dw.Max, AllNumAddrWords>.ret, 1011 !listconcat(lhs, [MIMGAddrSize<dw.Max, !empty(lhs)>]), 1022 !foldl([]<MIMGAddrSize>, nsa_group, lhs, dw, 1023 !if(isIntInList<dw, AllNumAddrWords>.ret, 1024 !listconcat(lhs, [MIMGAddrSize<dw, !empty(lhs)>]),
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| /llvm-project-15.0.7/clang/test/Driver/ |
| H A D | hip-toolchain-rdc.hip | 30 // MSVC: .section .hip_fatbin, "dw"
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| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming/hungarian-notation2/ |
| H A D | .clang-tidy | 234 value: dw
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| /llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/readability/ |
| H A D | identifier-naming.rst | 2537 char8_t c8 unsigned long long int ulli DWORD dw
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | AMDGPUUsage.rst | 2082 to the subprogram. See :ref:`amdgpu-dwarf-dw-at-llvm-lane-pc` for an example. 2093 .. _amdgpu-dwarf-dw-at-llvm-lane-pc: 2368 :ref:`amdgpu-dwarf-amdgpu-dw-at-llvm-active-lane` rather than the actual 2371 .. _amdgpu-dwarf-amdgpu-dw-at-llvm-active-lane: 2548 <amdgpu-dwarf-line-number-information-dw-lnct-llvm-source>`.
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