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/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Dshfl-p.ll4 declare {i32, i1} @llvm.nvvm.shfl.down.i32p(i32, i32, i32)
5 declare {float, i1} @llvm.nvvm.shfl.down.f32p(float, i32, i32)
20 %val = call {i32, i1} @llvm.nvvm.shfl.down.i32p(i32 %a, i32 %b, i32 %c)
31 %val = call {i32, i1} @llvm.nvvm.shfl.down.i32p(i32 %a, i32 %b, i32 %c)
41 %val = call {i32, i1} @llvm.nvvm.shfl.down.i32p(i32 %a, i32 %b, i32 1)
51 %val = call {i32, i1} @llvm.nvvm.shfl.down.i32p(i32 %a, i32 %b, i32 2)
61 %val = call {i32, i1} @llvm.nvvm.shfl.down.i32p(i32 %a, i32 1, i32 %c)
71 %val = call {i32, i1} @llvm.nvvm.shfl.down.i32p(i32 %a, i32 2, i32 %c)
78 ; CHECK: shfl.down.b32 [[OUT:%r[0-9]+]]|[[OUTP:%p[0-9]+]], [[A]], 1, 2;
80 %val = call {i32, i1} @llvm.nvvm.shfl.down.i32p(i32 %a, i32 1, i32 2)
[all …]
H A Dshfl-sync-p.ll4 declare {i32, i1} @llvm.nvvm.shfl.sync.down.i32p(i32, i32, i32, i32)
5 declare {float, i1} @llvm.nvvm.shfl.sync.down.f32p(i32, float, i32, i32)
21 %val = call {i32, i1} @llvm.nvvm.shfl.sync.down.i32p(i32 %mask, i32 %a, i32 %b, i32 %c)
32 %val = call {i32, i1} @llvm.nvvm.shfl.sync.down.i32p(i32 1, i32 %a, i32 %b, i32 %c)
51 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]]|[[OUTP:%p[0-9]+]], [[A]], [[B]], 2, 1;
53 %val = call {i32, i1} @llvm.nvvm.shfl.sync.down.i32p(i32 1, i32 %a, i32 %b, i32 2)
72 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]]|[[OUTP:%p[0-9]+]], [[A]], 2, [[C]], 1;
74 %val = call {i32, i1} @llvm.nvvm.shfl.sync.down.i32p(i32 1, i32 %a, i32 2, i32 %c)
91 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]]|[[OUTP:%p[0-9]+]], [[A]], 2, 3, 1;
93 %val = call {i32, i1} @llvm.nvvm.shfl.sync.down.i32p(i32 1, i32 %a, i32 2, i32 3)
[all …]
H A Dshfl-sync.ll4 declare i32 @llvm.nvvm.shfl.sync.down.i32(i32, i32, i32, i32)
5 declare float @llvm.nvvm.shfl.sync.down.f32(float, i32, i32, i32)
19 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], [[B]], [[C]], [[MASK]];
30 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], [[B]], [[C]], 1;
32 %val = call i32 @llvm.nvvm.shfl.sync.down.i32(i32 1, i32 %a, i32 %b, i32 %c)
41 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], [[B]], 1, [[MASK]];
51 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], [[B]], 2, 1;
62 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], 1, [[C]], [[MASK]];
72 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], 2, [[C]], 1;
82 ; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], 1, 2, [[MASK]];
[all …]
H A Dshfl.ll4 declare i32 @llvm.nvvm.shfl.down.i32(i32, i32, i32)
5 declare float @llvm.nvvm.shfl.down.f32(float, i32, i32)
14 ; shfl.down.
19 ; CHECK: shfl.down.b32 [[OUT:%r[0-9]+]], [[IN]], 1, 2;
21 %val = call i32 @llvm.nvvm.shfl.down.i32(i32 %in, i32 1, i32 2)
29 ; CHECK: shfl.down.{{.}}32 %r{{[0-9]+}}, [[IN1]], [[IN2]], 3;
38 ; CHECK: shfl.down.{{.}}32 %r{{[0-9]+}}, [[IN1]], 4, [[IN2]];
39 %val = call i32 @llvm.nvvm.shfl.down.i32(i32 %in, i32 4, i32 %mask)
53 ; Try shfl.down with floating-point params.
57 ; CHECK: shfl.down.b32 [[OUT:%f[0-9]+]], [[IN]], 5, 6;
[all …]
/llvm-project-15.0.7/llvm/test/MC/WebAssembly/
H A Dannotations.s41 # CHECK-NEXT: br 0 # 0: down to label0
44 # CHECK-NEXT: br_if 0 # 0: down to label1
46 # CHECK-NEXT: br_if 1 # 1: down to label1
50 # CHECK-NEXT: rethrow 0 # down to catch3
55 # CHECK-NEXT: br 0 # 0: down to label5
57 # CHECK-NEXT: delegate 1 # label/catch6: down to catch4
/llvm-project-15.0.7/clang/test/Rewriter/
H A Drewrite-nested-blocks-1.mm29 Baz *down;
37 [down b:^{
38 [down b:^{
40 didit = f4(up, down);
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dinduction-unroll-novec.ll36 %iv.down = phi i32 [ %start, %entry ], [ %iv.down.next, %loop ]
37 %iv.down.next = sub nsw i32 %iv.down, %step
39 store i32 %iv.down.next, i32* %gep.dst, align 2
H A Dmixed-precision-remarks.ll3 …rsion changes vector width. Mixed floating point precision requires an up/down cast that will nega…
24 …rsion changes vector width. Mixed floating point precision requires an up/down cast that will nega…
25 …rsion changes vector width. Mixed floating point precision requires an up/down cast that will nega…
26 …rsion changes vector width. Mixed floating point precision requires an up/down cast that will nega…
/llvm-project-15.0.7/llvm/test/Transforms/SampleProfile/
H A Dinline-replay.ll4 …uts/inline-topdown.prof -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
7 …ine-replay-scope=Module -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
10 …ne-topdown-missing.prof -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
13 …ine-replay-scope=Module -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
16 …ummary-hot-count=500000 -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
19 …ine-replay-scope=Module -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
41 …topdown-inline-all.prof -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
55 …/non-existent-dummy.txt -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
58 …e-replay-scope=function -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
61 …eplay-fallback=original -sample-profile-merge-inlinee -sample-profile-top-down-load -pass-remarks=…
[all …]
H A Dinline-topdown.ll1 ; Note that this needs new pass manager for now. Passing `-sample-profile-top-down-load` to legacy …
4 …le -sample-profile-file=%S/Inputs/inline-topdown.prof -sample-profile-top-down-load=false -S | Fil…
6 …sed on call path with context-sensitive profile while inlining with '-sample-profile-top-down-load'
7 …uts/inline-topdown.prof -sample-profile-merge-inlinee -sample-profile-top-down-load=true -S | File…
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Dvectorized-loop.ll20 %end.idx.rnd.down = add i64 %n.vec, %0
44 %12 = icmp eq i64 %index.next, %end.idx.rnd.down
49 %cmp.n = icmp eq i64 %end.idx, %end.idx.rnd.down
53 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ %end.idx.rnd.down, %middle.block ]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A D2011-03-09-Physreg-Coalescing.ll6 ; The 'call fastcc' ties down %ebx, %ecx, and %edx.
7 ; A MUL8r ties down %al, leaving no GR32_ABCD registers available.
H A Dregalloc-tight-invoke.ll9 ; be used instead, cutting available registers for %b.arg down to eax, ebx,
13 ; 3. The al fiddling for the varargs call only noted down that al was spillable,
/llvm-project-15.0.7/polly/docs/
H A DTipsAndTricks.rst10 Using bugpoint to track down errors in large files
33 …- ``$ bugpoint -O3 file.ll -opt-args -polly`` will allow bugpoint to track down the pass which ca…
38 - Bisect down to the pass that changes it.
/llvm-project-15.0.7/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/
H A Dwasm_generated_funcs.ll.nogenerated.expected26 ; CHECK-NEXT: br_if 0 # 0: down to label1
40 ; CHECK-NEXT: br 1 # 1: down to label0
52 ; CHECK-NEXT: br_if 0 # 0: down to label3
66 ; CHECK-NEXT: br 1 # 1: down to label2
H A Dwasm_generated_funcs.ll.generated.expected85 ; CHECK-NEXT: br_if 0 # 0: down to label1
99 ; CHECK-NEXT: br 1 # 1: down to label0
111 ; CHECK-NEXT: br_if 0 # 0: down to label3
125 ; CHECK-NEXT: br 1 # 1: down to label2
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dint-mul-06.ll114 ; Check the next value down, which should use shifts.
124 ; Check the next value down again, which can use MSGFI.
142 ; Check the next value down, which should use shifts.
152 ; Check the next value down again, which cannot use constant multiplication
H A Dint-mul-05.ll114 ; Check the next value down, which should use shifts.
124 ; Check the next value down again, which can use MSFI.
142 ; Check the next value down, which should use shifts.
152 ; Check the next value down again, which is treated as a positive value.
H A Dint-add-07.ll87 ; Check the next value down, which must use AGFI instead.
105 ; Check the next value down, which must use SLGFI instead.
123 ; Check the next value down, which must use register addition instead.
/llvm-project-15.0.7/mlir/test/Transforms/
H A Dtest-operation-folder.mlir1 // RUN: mlir-opt -test-patterns='top-down=false' %s | FileCheck %s
2 // RUN: mlir-opt -test-patterns='top-down=true' %s | FileCheck %s
/llvm-project-15.0.7/libcxx/
H A D.clang-tidy32 value: 143 # TODO: bring that number down
34 value: 194 # TODO: bring that number down
/llvm-project-15.0.7/lld/test/wasm/
H A Dshared-memory-bss.s52 # CHECK-NEXT: br_table {0, 1, 2} # 1: down to label1
53 # CHECK-NEXT: # 2: down to label0
/llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/X86/
H A Dno_superflous_induction_vars.ll36 %end.idx.rnd.down = add i64 %n.vec, %0
45 %6 = icmp eq i64 %index.next, %end.idx.rnd.down
/llvm-project-15.0.7/mlir/lib/Target/LLVMIR/Dialect/NVVM/
H A DNVVMToLLVMIRTranslation.cpp40 case NVVM::ShflKind::down: in getShflIntrinsicId()
56 case NVVM::ShflKind::down: in getShflIntrinsicId()
/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Dsimd-conversions.ll105 ; CHECK-NEXT: br_if 0 # 0: down to label1
110 ; CHECK-NEXT: br 1 # 1: down to label0
126 ; CHECK-NEXT: br_if 0 # 0: down to label3
131 ; CHECK-NEXT: br 1 # 1: down to label2
164 ; CHECK-NEXT: br_if 0 # 0: down to label5
169 ; CHECK-NEXT: br 1 # 1: down to label4
188 ; CHECK-NEXT: br_if 0 # 0: down to label7
193 ; CHECK-NEXT: br 1 # 1: down to label6

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