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Searched refs:dmul (Results 1 – 18 of 18) sorted by relevance

/llvm-project-15.0.7/llvm/test/MC/Mips/cnmips/
H A Dvalid.s20 # CHECK: dmul $9, $6, $7 # encoding: [0x70,0xc7,0x48,0x03]
21 # CHECK: dmul $19, $24, $25 # encoding: [0x73,0x19,0x98,0x03]
22 # CHECK: dmul $9, $9, $6 # encoding: [0x71,0x26,0x48,0x03]
23 # CHECK: dmul $21, $21, $25 # encoding: [0x72,0xb9,0xa8,0x03]
79 dmul $9, $6, $7
80 dmul $19, $24, $25
81 dmul $9, $6
82 dmul $21, $25
/llvm-project-15.0.7/llvm/test/MC/Mips/cnmipsp/
H A Dvalid.s21 # CHECK: dmul $9, $6, $7 # encoding: [0x70,0xc7,0x48,0x03]
22 # CHECK: dmul $19, $24, $25 # encoding: [0x73,0x19,0x98,0x03]
23 # CHECK: dmul $9, $9, $6 # encoding: [0x71,0x26,0x48,0x03]
24 # CHECK: dmul $21, $21, $25 # encoding: [0x72,0xb9,0xa8,0x03]
82 dmul $9, $6, $7
83 dmul $19, $24, $25
84 dmul $9, $6
85 dmul $21, $25
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dmadd-msub.ll57 ; 64R6-NEXT: dmul $1, $2, $1
122 ; 64R6-NEXT: dmul $1, $5, $4
187 ; 64R6-NEXT: dmul $1, $2, $1
306 ; 64R6-NEXT: dmul $1, $2, $1
372 ; 64R6-NEXT: dmul $1, $5, $4
438 ; 64R6-NEXT: dmul $1, $2, $1
561 ; 64R6-NEXT: dmul $1, $2, $1
H A Dmips64instrs.ll94 ; GPRMULDIV: dmul $2, ${{[45]}}, ${{[45]}}
105 ; GPRMULDIV: dmul $2, ${{[45]}}, ${{[45]}}
H A Dmips64muldiv.ll16 ; GPR: dmul $2, ${{[45]}}, ${{[45]}}
H A Docteon.ll22 ; OCTEON: dmul $2, $4, $5
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/llvm-ir/
H A Dmul.ll208 ; 64R6: dmul $2, $4, $5
245 ; 64R6-DAG: dmul $[[T1:[0-9]+]], $5, $6
248 ; 64R6-DAG: dmul $[[T0:[0-9]+]], $4, $7
250 ; 64R6-DAG: dmul $3, $5, $7
/llvm-project-15.0.7/clang/test/CodeGen/
H A Darm-float-helpers.c94 double dmul(double a, double b) { return a * b; } in dmul() function
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/octeon/
H A Dvalid-el.txt11 0x03 0x48 0xc7 0x70 # CHECK: dmul $9, $6, $7
H A Dvalid.txt11 0x70 0xc7 0x48 0x03 # CHECK: dmul $9, $6, $7
/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dmul-macro-variants.s117 dmul $4, $5, $6
122 dmul $4, $5, 1
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/octeonp/
H A Dvalid.txt11 0x70 0xc7 0x48 0x03 # CHECK: dmul $9, $6, $7
H A Dvalid-el.txt11 0x03 0x48 0xc7 0x70 # CHECK: dmul $9, $6, $7
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dfloat-helpers.s384 define double @dmul(double %a, double %b) #0 {
385 ; CHECK-SOFT-LABEL: dmul:
392 ; CHECK-SOFTFP-LABEL: dmul:
399 ; CHECK-HARDFP-DP-LABEL: dmul:
403 ; CHECK-HARDFP-SPONLY-LABEL: dmul:
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r6/
H A Dvalid-mips64r6-el.txt117 0x9c 0x10 0x64 0x00 # CHECK: dmul $2, $3, $4
H A Dvalid-mips64r6.txt19 0x00 0x64 0x10 0x9c # CHECK: dmul $2, $3, $4
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMips64r6InstrInfo.td74 class DMUL_R6_DESC : MUL_R6_DESC_BASE<"dmul", GPR64Opnd, II_DMUL, mul>;
H A DMips64InstrInfo.td524 def DMUL : ArithLogicR<"dmul", GPR64Opnd, 1, II_DMUL, mul>,
1115 "dmul\t$rs, $rt, $imm">,
1128 "dmul\t$rs, $rt, $rd"> {