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/llvm-project-15.0.7/llvm/test/CodeGen/AVR/
H A Ddiv.ll3 ; Unsigned 8-bit division
13 ; Signed 8-bit division
23 ; Unsigned 16-bit division
33 ; Signed 16-bit division
43 ; Unsigned 32-bit division
54 ; Signed 32-bit division
65 ; Unsigned 64-bit division
74 ; Signed 64-bit division
83 ; Unsigned 128-bit division
92 ; Signed 128-bit division
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/abseil/
H A Dduration-division.rst1 .. title:: clang-tidy - abseil-duration-division
3 abseil-duration-division
7 division of two ``absl::Duration`` objects returns an ``int64`` with any fractional
16 int64 sec2 = absl::ToInt64Seconds(d); // Equivalent to division.
22 If you want floating-point division, you should use either the
34 This check looks for uses of ``absl::Duration`` division that is done in a
H A Dduration-unnecessary-conversion.rst23 // Suggestion - Remove division and conversion
37 // Original - Integer division followed by conversion
40 // Suggestion - Remove division and conversion
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dvec-div-01.ll1 ; Test vector division. There is no native integer support for this,
6 ; Test a v16i8 division.
29 ; Test a v8i16 division.
44 ; Test a v4i32 division.
55 ; Test a v2i64 division.
64 ; Test a v2f64 division.
74 ; Test an f64 division that uses vector registers.
H A Dint-div-06.ll5 ; Check signed 32-bit division.
18 ; Check unsigned 32-bit division.
29 ; Check signed 64-bit division.
46 ; Check unsigned 64-bit division.
H A Dvec-div-02.ll1 ; Test vector division on z14.
5 ; Test a v4f32 division.
15 ; Test an f32 division that uses vector registers.
H A Dvec-strict-div-01.ll1 ; Test strict vector division.
8 ; Test a v2f64 division.
21 ; Test an f64 division that uses vector registers.
H A Dvec-strict-div-02.ll1 ; Test strict vector division on z14.
8 ; Test a v4f32 division.
21 ; Test an f32 division that uses vector registers.
H A Dint-div-03.ll1 ; Test 64-bit signed division and remainder when the divisor is
8 ; Test register division. The result is in the second of the two registers.
34 ; Test that division and remainder use a single instruction.
49 ; Test register division when the dividend is zero rather than sign extended.
72 ; Test memory division with no displacement.
100 ; Test both memory division and memory remainder.
196 ; a load and division cannot be combined.
H A Dfp-div-03.ll1 ; Test 128-bit floating-point division.
5 ; There is no memory form of 128-bit division.
H A Dfp-strict-div-03.ll1 ; Test strict 128-bit floating-point division.
8 ; There is no memory form of 128-bit division.
H A Dint-div-01.ll1 ; Test 32-bit signed division and remainder.
7 ; Test register division. The result is in the second of the two registers.
31 ; Test that division and remainder use a single instruction.
80 ; Test memory division with no displacement.
106 ; Test both memory division and memory remainder.
196 ; a load and division cannot be combined.
H A Dint-div-04.ll1 ; Testg 64-bit signed division and remainder.
7 ; Testg register division. The result is in the second of the two registers.
31 ; Testg that division and remainder use a single instruction.
46 ; Testg memory division with no displacement.
72 ; Testg both memory division and memory remainder.
H A Dint-div-02.ll1 ; Test 32-bit unsigned division and remainder.
7 ; Test register division. The result is in the second of the two registers.
35 ; Test that division and remainder use a single instruction.
51 ; Test memory division with no displacement.
81 ; Test both memory division and memory remainder.
H A Dint-div-05.ll1 ; Testg 64-bit unsigned division and remainder.
7 ; Testg register division. The result is in the second of the two registers.
35 ; Testg that division and remainder use a single instruction.
51 ; Testg memory division with no displacement.
81 ; Testg both memory division and memory remainder.
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/bugprone/
H A Dinteger-division.rst1 .. title:: clang-tidy - bugprone-integer-division
3 bugprone-integer-division
6 Finds cases where integer division in a floating point context is likely to
31 // OK, no integer division.
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Arithmetic/IR/
H A DArithmeticOps.td240 // Scalar unsigned integer division.
243 // SIMD vector element-wise division.
246 // Tensor element-wise integer division.
263 Note: the semantics of division by zero or signed division overflow (minimum
269 // Scalar signed integer division.
272 // SIMD vector element-wise division.
299 // Scalar unsigned integer division.
315 Note: the semantics of division by zero or signed division overflow (minimum
321 // Scalar signed integer division.
337 Note: the semantics of division by zero or signed division overflow (minimum
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dpr38697.ll27 ; No explicit division appears in the input, but a division is generated during
28 ; vectorization, and that division is a division-by-0 when the input 'count'
114 ; division from the inner loop to the preheader.
175 ; and so it is illegal to hoist the division because if 'start1' is 0, hoisting
234 ; This version is has a clearly safe division by a non-zero constant (16). The
235 ; division is transformed to a logical-shift-right of 4, and it is safely
238 ; Verify that the division-operation is hoisted, and that it appears as a
239 ; right-shift ('lshr') rather than an explicit division.
296 ; This version is has a clearly safe division by a non-zero constant (17). The
298 ; it remains a division, rather than being transformed to a right-shift.
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopDeletion/
H A Dmultiple-exits.ll67 ; This unused division prevents unifying this loop exit path with others
78 ; This unused division prevents unifying this loop exit path with others
116 ; This unused division prevents unifying this loop exit path with others
125 ; This unused division prevents unifying this loop exit path with others
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dfdiv-combine.ll4 ; More than one 'arcp' division using a single divisor operand
7 ; Don't do anything for just one division.
35 ; The first division is not 'arcp', so do not optimize.
50 ; The second division is not 'arcp', so do not optimize.
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DREADME.txt18 2. Libcalls: multiplication, division, remainder. Note, that calling convention
22 3. Implement multiplication / division by constant (dag combiner hook?).
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Ddivrem.ll8 ; RUN: llc -march=mips -mcpu=mips32 -mno-check-zero-division -relocation-model=pic < %s | FileC…
9 ; RUN: llc -march=mips -mcpu=mips32r2 -mno-check-zero-division -relocation-model=pic < %s | FileC…
10 ; RUN: llc -march=mips -mcpu=mips32r6 -mno-check-zero-division -relocation-model=pic < %s | FileC…
11 ; RUN: llc -march=mips64 -mcpu=mips64 -mno-check-zero-division -relocation-model=pic < %s | FileC…
12 ; RUN: llc -march=mips64 -mcpu=mips64r2 -mno-check-zero-division -relocation-model=pic < %s | FileC…
13 ; RUN: llc -march=mips64 -mcpu=mips64r6 -mno-check-zero-division -relocation-model=pic < %s | FileC…
/llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/NVPTX/
H A Dbypass-slow-div-special-cases.ll17 ; %a.2 is always negative so the division cannot be bypassed.
49 ; If both operands are known to fit into 32 bits, then replace the division
69 ; In case of unsigned long division with a short dividend,
70 ; the long division is not needed any more.
98 ; Do not bypass a division if one of the operands looks like a hash value.
/llvm-project-15.0.7/clang/utils/check_cfc/
H A Dsetup.py4 from __future__ import absolute_import, division, print_function
/llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/
H A Dhigh-cost-trip-count-computation.ll27 ;; Though SCEV for loop tripcount contains division,
28 ;; it shouldn't be considered expensive, since the division already

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