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Searched refs:disablePass (Results 1 – 6 of 6) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVTargetMachine.cpp118 disablePass(&MachineCopyPropagationID); in addPostRegAlloc()
119 disablePass(&PostRAMachineSinkingID); in addPostRegAlloc()
120 disablePass(&PostRASchedulerID); in addPostRegAlloc()
121 disablePass(&FuncletLayoutID); in addPostRegAlloc()
122 disablePass(&StackMapLivenessID); in addPostRegAlloc()
123 disablePass(&PatchableFunctionID); in addPostRegAlloc()
124 disablePass(&ShrinkWrapID); in addPostRegAlloc()
125 disablePass(&LiveDebugValuesID); in addPostRegAlloc()
128 disablePass(&BranchFolderPassID); in addPostRegAlloc()
129 disablePass(&MachineBlockPlacementID); in addPostRegAlloc()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXTargetMachine.cpp302 disablePass(&PrologEpilogCodeInserterID); in addIRPasses()
303 disablePass(&MachineCopyPropagationID); in addIRPasses()
304 disablePass(&TailDuplicateID); in addIRPasses()
305 disablePass(&StackMapLivenessID); in addIRPasses()
306 disablePass(&LiveDebugValuesID); in addIRPasses()
307 disablePass(&PostRAMachineSinkingID); in addIRPasses()
308 disablePass(&PostRASchedulerID); in addIRPasses()
309 disablePass(&FuncletLayoutID); in addIRPasses()
310 disablePass(&PatchableFunctionID); in addIRPasses()
311 disablePass(&ShrinkWrapID); in addIRPasses()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyTargetMachine.cpp489 disablePass(&MachineCopyPropagationID); in addPostRegAlloc()
490 disablePass(&PostRAMachineSinkingID); in addPostRegAlloc()
491 disablePass(&PostRASchedulerID); in addPostRegAlloc()
492 disablePass(&FuncletLayoutID); in addPostRegAlloc()
493 disablePass(&StackMapLivenessID); in addPostRegAlloc()
494 disablePass(&LiveDebugValuesID); in addPostRegAlloc()
495 disablePass(&PatchableFunctionID); in addPostRegAlloc()
496 disablePass(&ShrinkWrapID); in addPostRegAlloc()
500 disablePass(&MachineBlockPlacementID); in addPostRegAlloc()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetMachine.cpp971 disablePass(&StackMapLivenessID); in AMDGPUPassConfig()
972 disablePass(&FuncletLayoutID); in AMDGPUPassConfig()
974 disablePass(&GCLoweringID); in AMDGPUPassConfig()
975 disablePass(&ShadowStackGCLoweringID); in AMDGPUPassConfig()
1006 disablePass(&StackMapLivenessID); in addIRPasses()
1007 disablePass(&FuncletLayoutID); in addIRPasses()
1008 disablePass(&PatchableFunctionID); in addIRPasses()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetPassConfig.h196 void disablePass(AnalysisID PassID) { in disablePass() function
H A DCodeGenPassBuilder.h222 void disablePass(AnalysisKey *ID) { in disablePass() function