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/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dd16.s1 @ RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+vfp4,+d32 2>&1 | Fil…
2 @ RUN: not llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+vfp4,-d32 2>&1 | Fil…
H A Dvldm-vstm-diags.s2 @ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null -mattr=-d32 %s 2>&1 | FileCheck %s…
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Darm32-rounding.ll2 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabihf -mattr=+fp-armv8,-d32,-fp64 | FileCheck --check-…
3 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabihf -mattr=+fp-armv8,-d32 | FileCheck --check-prefix…
H A Dcmse-clear-float-bigend.mir19 …ze"="8" "target-cpu"="generic" "target-features"="+8msecext,+armv8-m.main,-d32,-fp64,+fp-armv8,+hw…
H A Dinlineasm-operand-implicit-cast.ll138 attributes #0 = { nounwind "target-features"="-d32,+vfp2,+vfp3" "use-soft-float"="true" }
308 attributes #1 = { nounwind "target-features"="-d32,+vfp2,+vfp3" "use-soft-float"="false" }
H A Dha-alignstack.ll190 attributes #0 = { "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+strict-…
H A Dbuild-attributes.ll36 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,-d32 | FileCheck %s --che…
70 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-d32,+fp16 | FileCheck %s --check-p…
71 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32 | FileCheck %s --check-p…
72 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32,+fp16 | FileCheck %s --c…
159 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,-d32,-neon | FileCh…
224 ; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-neon,-fp64,-d32 | FileCheck %s…
H A Dha-alignstack-call.ll343 attributes #0 = { nounwind "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon…
/llvm-project-15.0.7/llvm/test/CodeGen/MIR/ARM/
H A Dthumb2-sub-sp-t3.mir21 …ector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+fpregs,…
22 …ector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+fpregs,…
/llvm-project-15.0.7/llvm/test/MC/X86/
H A Dx86-32.s1128 jmp.d32 foo
1138 je.d32 foo
H A Dx86-64.s1931 movl.d32 $1, (%rax)
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dt2sizereduction.mir32 …ck-protector-buffer-size"="8" "target-cpu"="cortex-m7" "target-features"="-d32,+dsp,+fp-armv8,-fp6…
/llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/ARM/
H A Darm_add_q7.ll182 …ecp0,-cdecp1,-cdecp2,-cdecp3,-cdecp4,-cdecp5,-cdecp6,-cdecp7,-crc,-crypto,-d32,-dotprod,-fp-armv8,…
183 …ecp0,-cdecp1,-cdecp2,-cdecp3,-cdecp4,-cdecp5,-cdecp6,-cdecp7,-crc,-crypto,-d32,-dotprod,-fp-armv8,…
H A Darm_mult_q15.ll222 …ecp0,-cdecp1,-cdecp2,-cdecp3,-cdecp4,-cdecp5,-cdecp6,-cdecp7,-crc,-crypto,-d32,-dotprod,-fp-armv8,…
224 …ecp0,-cdecp1,-cdecp2,-cdecp3,-cdecp4,-cdecp5,-cdecp6,-cdecp7,-crc,-crypto,-d32,-dotprod,-fp-armv8,…
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/ARM/
H A Dmve-vldn.ll87 …+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp,-crypto,-d32,-fp-armv8,-fp-armv8…
/llvm-project-15.0.7/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp578 int32_t d32; in readDisplacement() local
596 if (consume(insn, d32)) in readDisplacement()
598 insn->displacement = d32; in readDisplacement()
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/LowOverheadLoops/
H A Dvpt-block-debug.mir122 …bf16,-cdecp1,-cdecp2,-cdecp3,-cdecp4,-cdecp5,-cdecp6,-cdecp7,-crc,-crypto,-d32,-dotprod,-fp-armv8,…
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARM.td60 def FeatureD32 : SubtargetFeature<"d32", "HasD32", "true",