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/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dalloca-crspill.ll21 tail call void asm sideeffect "", "~{cr2}"()
44 ; CHECK64-NEXT: isImmutable: true, isAliased: false, callee-saved-register: '$cr2',
81 ; CHECK64-NEXT: liveins: $x3, $cr2
85 ; ELFV2-NEXT: $x12 = MFOCRF8 killed $cr2
86 ; V1ANDAIX-NEXT: $x12 = MFCR8 implicit killed $cr2
99 ; CHECK64: INLINEASM {{.*}} early-clobber $cr2
108 ; CHECK64: $cr2 = MTOCRF8 killed $x12
113 ; CHECK32-NEXT: liveins: $r3, $cr2
117 ; CHECK32-NEXT: $r12 = MFCR implicit killed $cr2
126 ; CHECK32: INLINEASM {{.*}} early-clobber $cr2
[all …]
H A Dppc64-crsave.mir40 ; CHECK: liveins: $x3, $x29, $cr2, $cr4
42 ; CHECK: $x12 = MFCR8 implicit killed $cr2, implicit killed $cr4
48 ; CHECK: $cr2 = MTOCRF8 $x12
73 ; CHECK-NEXT: isImmutable: true, isAliased: false, callee-saved-register: '$cr2',
79 ; CHECK: liveins: $x3, $x14, $cr2
83 ; SAVEONE: $x12 = MFOCRF8 killed $cr2
84 ; SAVEALL: $x12 = MFCR8 implicit killed $cr2
91 ; CHECK: $cr2 = MTOCRF8 killed $x12
H A Dp10-spill-crun.ll50 ; CHECK-NEXT: .cfi_offset cr2, 8
65 ; CHECK-NEXT: crnot 4*cr2+eq, eq
70 ; CHECK-NEXT: crmove 4*cr2+gt, gt
79 ; CHECK-NEXT: crmove 4*cr2+un, gt
91 ; CHECK-NEXT: crnot 4*cr2+lt, eq
103 ; CHECK-NEXT: setnbc r3, 4*cr2+un
114 ; CHECK-NEXT: cmpwi cr2, r27, 0
196 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
197 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
198 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
[all …]
H A Dcrsave.ll10 …%0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i…
31 ; PPC64: .cfi_offset cr2, 8
40 …w 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32…
69 tail call void asm sideeffect "# clobbers", "~{cr2}"()
79 tail call void asm sideeffect "# clobbers", "~{cr2},~{cr3},~{cr4}"()
H A Dp10-spill-crgt.ll30 ; CHECK-NEXT: .cfi_offset cr2, 8
41 ; CHECK-NEXT: crmove 4*cr2+gt, gt
43 ; CHECK-NEXT: crmove 4*cr2+lt, gt
58 ; CHECK-NEXT: bc 12, 4*cr2+gt, .LBB0_31
199 ; CHECK-NEXT: bc 4, 4*cr2+lt, .LBB0_33
204 ; CHECK-NEXT: bc 4, 4*cr2+lt, .LBB0_33
221 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
222 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
223 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
231 ; CHECK-BE-NEXT: crmove 4*cr2+gt, gt
[all …]
H A Dp10-spill-crlt.ll37 ; CHECK-NEXT: .cfi_offset cr2, 8
72 ; CHECK-NEXT: mcrf cr2, cr0
74 ; CHECK-NEXT: beq+ cr2, .LBB0_3
101 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
102 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
103 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
140 ; CHECK-BE-NEXT: mcrf cr2, cr0
143 ; CHECK-BE-NEXT: beq+ cr2, .LBB0_3
H A Dppc64le-crsave.ll11 call void asm sideeffect "", "~{cr2}"()
25 ; CHECK: .cfi_offset cr2, 8
H A Daix32-crsave.mir31 ; CHECK-NEXT: liveins: $r3, $r29, $cr2, $cr4
33 ; CHECK: $r12 = MFCR implicit killed $cr2, implicit killed $cr4
39 ; CHECK-NEXT: $cr2 = MTOCRF $r12
H A Dcc.ll11 …call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5}…
44 …call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cc},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},…
H A Dp10-spill-creq.ll50 ; CHECK-NEXT: crnot 4*cr2+un, 4*cr1+eq
66 ; CHECK-NEXT: crand 4*cr5+eq, gt, 4*cr2+un
85 ; CHECK-NEXT: crand 4*cr4+gt, 4*cr7+lt, 4*cr2+un
109 ; CHECK-NEXT: crand 4*cr5+gt, 4*cr7+eq, 4*cr2+un
110 ; CHECK-NEXT: mcrf cr2, cr1
116 ; CHECK-NEXT: crand 4*cr5+lt, 4*cr2+eq, 4*cr5+lt
147 ; CHECK-NEXT: crandc 4*cr5+eq, 4*cr5+eq, 4*cr2+eq
H A D2010-02-12-saveCR.ll19 call void asm sideeffect "", "~{cr2},~{cr3}"() nounwind
H A DNoCRFieldRedefWhenSpillingCRBIT.mir17 …tail call void asm sideeffect "# nothing", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7…
102 …implicit-def dead early-clobber $cr1, 12, implicit-def dead early-clobber $cr2, 12, implicit-def d…
H A Dsave-cr-ppc32svr4.ll19 %a1 = tail call double asm "fadd $0, $1, $2", "=f,f,f,~{cr2}"(double %a0, double %a0)
H A Daix-crspill.ll16 …tail call void asm sideeffect "# Clobber CR", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{…
H A Dsave-crbp-ppc32svr4.ll26 %a1 = tail call double asm "fadd $0, $1, $2", "=f,f,f,~{cr2}"(double %a0, double %a0)
H A DknowCRBitSpill.ll59 …tail call void asm sideeffect "#DO_NOTHING", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{c…
112 …tail call void asm sideeffect "#DO_NOTHING", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{c…
H A Dspill_p9_setb.ll44 …tail call void asm sideeffect "#Clobber", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}…
H A Dpr48519.ll158 ; CHECK-NEXT: crnot 4*cr2+lt, eq
165 ; CHECK-NEXT: bc 4, 4*cr2+lt, .LBB2_6
/llvm-project-15.0.7/clang/test/CXX/dcl.decl/dcl.decomp/
H A Dp2.cpp23 const auto &[cr0, cr1, cr2] = arr; in array()
33 return r1 + cr2; in array()
/llvm-project-15.0.7/clang/test/Modules/
H A Dnamespaces.cpp61 char &cr2 = N6::f('b'); in testMerged() local
/llvm-project-15.0.7/llvm/test/MC/PowerPC/
H A Dppc64-regs.s79 #CHECK: .cfi_offset cr2, 622
195 .cfi_offset cr2,622
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dinline-asm-q-regs.ll8 …%asmtmp = call %0 asm sideeffect "mov %cr0, $0 \0Amov %cr2, $1 \0Amov %cr3, $…
H A Dipra-reg-usage.ll6 …p $hsp $ip $mxcsr $rip $riz $rsp $sp $sph $spl $ss $ssp $tmmcfg $cr0 $cr1 $cr2 $cr3 $cr4 $cr5 $cr6…
/llvm-project-15.0.7/lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/
H A Da.out.crash41 rip: 0x000000010b92af70 rfl: 0x0000000000010202 cr2: 0x0000000000000000
H A Da.out.ips66 "cr2": {

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