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/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Darith.ll35 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
54 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
73 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
92 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
168 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
187 ; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1184 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
1188 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
1192 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
1200 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
[all …]
H A Dtrunc.ll25 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
33 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
41 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
97 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
173 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
240 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
307 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
374 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
441 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1082 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
H A Dvector-extract.ll29 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
43 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
57 ; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
94 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
113 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
170 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
184 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
212 ; SSE4-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
226 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
254 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
H A Dicmp.ll40 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
63 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
86 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
109 ; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
132 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
155 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
178 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
293 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
344 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
367 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
H A Dfcmp.ll28 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
41 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
54 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
67 ; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
80 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
93 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
135 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
148 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
200 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
307 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
H A Dmul32.ll40 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
58 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
76 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
94 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
112 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
148 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
166 ; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
203 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
257 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
311 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
[all …]
H A Dfptosi.ll19 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
26 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
33 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
54 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
69 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
83 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
90 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
104 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
133 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
147 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
H A Duitofp.ll19 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
26 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
33 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
40 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
62 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
69 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
76 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
83 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
105 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
119 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
H A Dsitofp.ll19 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
26 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
33 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
40 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
62 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
69 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
76 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
83 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
105 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
119 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
H A Dload_store.ll61 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
112 ; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
163 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
214 ; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
472 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
658 ; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
844 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1307 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1409 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
2090 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
H A Dmin-legal-vector-width.ll15 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
39 ; SKX256-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
47 ; SKX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
64 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
88 ; SKX256-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
96 ; SKX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
114 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
141 ; SKX256-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
150 ; SKX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
169 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
[all …]
H A Dextend.ll26 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
35 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
44 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
107 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
135 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
152 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
169 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
186 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
203 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
369 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
H A Dcast.ll20 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
42 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
405 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
427 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
438 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
468 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
482 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
489 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
515 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
621 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
[all …]
H A Dfptoui.ll19 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
26 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
33 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
40 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
61 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
76 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
90 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
97 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
111 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
140 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/ARM/
H A Dcontrol-flow.ll2 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thu…
3 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thu…
4 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thu…
5 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=arm…
6 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=latency -mtriple=thu…
7 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=latency -mtriple=thu…
8 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=latency -mtriple=thu…
9 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=throughput -mtriple=thu…
10 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=throughput -mtriple=thu…
11 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=throughput -mtriple=thu…
[all …]
H A Darith.ll8 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=thumbv8.1…
23 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
59 ; CHECK-V8R-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
96 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
132 ; CHECK-V8R-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
169 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
205 ; CHECK-V8R-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
242 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
278 ; CHECK-V8R-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
315 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
[all …]
H A Dimmediates.ll2 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thu…
3 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thu…
4 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=latency -mtriple=thu…
5 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=latency -mtriple=thu…
6 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=throughput -mtriple=thu…
7 ; RUN: opt < %s -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=throughput -mtriple=thu…
32 ; CHECK-T1-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 1
54 ; CHECK-T2-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 1
76 ; CHECK-T1-LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 1
98 ; CHECK-T2-LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 1
[all …]
H A Dload_store.ll8 ; RUN: opt -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thumbv8a-…
9 ; RUN: opt -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thumbv8.1…
38 ; CHECK-NOVEC-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
64 ; CHECK-FP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
90 ; CHECK-MVE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
116 ; CHECK-NEON-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
142 ; CHECK-V8-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
225 ; CHECK-NOVEC-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
251 ; CHECK-FP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
277 ; CHECK-MVE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AMDGPU/
H A Dshifts.ll4 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
5 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
30 ; FAST64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
53 ; SLOW64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
76 ; FAST64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
99 ; SLOW64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
146 ; FAST64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
169 ; SLOW64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
192 ; FAST64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
262 ; FAST64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
[all …]
H A Dfdiv.ll8 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
9 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
10 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-me…
11 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-me…
12 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
24 ; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
34 ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
55 ; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
116 ; FP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
169 ; FP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
[all …]
H A Dbit-ops.ll4 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
5 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
26 ; SLOW16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
45 ; FAST16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
64 ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
83 ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
122 ; SLOW16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
141 ; FAST16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
160 ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
218 ; SLOW16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
[all …]
H A Dfused_costs.ll29 ; SLOWF32-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
44 ; FASTF32-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
59 ; SLOWF32-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
74 ; FASTF32-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
110 ; FUSED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
125 ; GFX9SLOW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
140 ; FUSED-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
155 ; GFX9SLOW-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
191 ; SLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
206 ; GFX9FAST-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
[all …]
H A Dfmul.ll5 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
6 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
7 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-un…
29 ; F32-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
39 ; GFX90A-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
49 ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
76 ; FASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
84 ; SLOW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
100 ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
119 ; GFX9-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/SystemZ/
H A Dscalar-cmp-cmp-log-sel.ll16 ; CHECK: cost of 3 for instruction: %cmp0 = icmp eq i8 %val1, %val2
17 ; CHECK: cost of 3 for instruction: %cmp1 = icmp eq i8 %val3, %val4
18 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
33 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
48 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
63 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
78 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
93 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
108 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
123 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/PowerPC/
H A Dvector_unit.ll13 ; CHECK: cost of 1 {{.*}} add
14 ; CHECK: cost of 1 {{.*}} zext
15 ; CHECK: cost of 1 {{.*}} load
16 ; CHECK: cost of 1 {{.*}} store
17 ; CHECK: cost of 1 {{.*}} icmp
18 ; CHECK-P9: cost of 1 {{.*}} add
19 ; CHECK-P9: cost of 1 {{.*}} zext
33 ; CHECK: cost of 1 {{.*}} add
34 ; CHECK: cost of 1 {{.*}} zext
36 ; CHECK: cost of 1 {{.*}} icmp
[all …]

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