Searched refs:convertToReg (Results 1 – 8 of 8) sorted by relevance
1154 VA.convertToReg(Mips::F12); in processCallArgs()1157 VA.convertToReg(Mips::D6_64); in processCallArgs()1159 VA.convertToReg(Mips::D6); in processCallArgs()1164 VA.convertToReg(Mips::F14); in processCallArgs()1167 VA.convertToReg(Mips::D7_64); in processCallArgs()1169 VA.convertToReg(Mips::D7); in processCallArgs()1178 VA.convertToReg(Mips::A0); in processCallArgs()1181 VA.convertToReg(Mips::A1); in processCallArgs()1184 VA.convertToReg(Mips::A2); in processCallArgs()1187 VA.convertToReg(Mips::A3); in processCallArgs()
234 PendingMember.convertToReg(RegResult); in CC_ARM_AAPCS_Custom_Aggregate()252 It.convertToReg(State.AllocateReg(RegList[RegIdx++])); in CC_ARM_AAPCS_Custom_Aggregate()
134 It.convertToReg(Reg); in CC_SystemZ_I128Indirect()
167 It.convertToReg(RegResult); in CC_AArch64_Custom_Block()
282 It.convertToReg(State.AllocateReg(RegList[FirstFree++])); in CC_X86_32_MCUInReg()
3138 VA.convertToReg(X86::FP0); // Set reg to FP0, avoid hitting asserts. in LowerReturn()3145 VA.convertToReg(X86::FP0); // Set reg to FP0, avoid hitting asserts. in LowerReturn()3468 VA.convertToReg(X86::FP1); // Set reg to FP1, avoid hitting asserts. in LowerCallResult()3470 VA.convertToReg(X86::FP0); // Set reg to FP0, avoid hitting asserts. in LowerCallResult()3476 VA.convertToReg(X86::FP1); // Set reg to FP1, avoid hitting asserts. in LowerCallResult()3478 VA.convertToReg(X86::FP0); // Set reg to FP0, avoid hitting asserts. in LowerCallResult()
130 void convertToReg(unsigned RegNo) { in convertToReg() function
10532 It.convertToReg(Reg); in CC_RISCV()