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/llvm-project-15.0.7/clang/lib/AST/
H A DLinkage.h107 LVComputationKind computation);
110 LVComputationKind computation);
114 LVComputationKind computation);
118 LVComputationKind computation);
122 LVComputationKind computation);
125 LVComputationKind computation,
129 LVComputationKind computation,
133 LVComputationKind computation);
136 LVComputationKind computation);
138 LinkageInfo getLVForType(const Type &T, LVComputationKind computation);
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H A DDecl.cpp162 return computation.IgnoreExplicitVisibility; in hasExplicitVisibilityAlready()
243 if (computation.IgnoreAllVisibility) in getLVForType()
339 LV.merge(getLVForDecl(ND, computation)); in getLVForTemplateArgumentList()
392 LVComputationKind computation) { in mergeTemplateLV() argument
418 if (computation.IgnoreAllVisibility) in hasDirectVisibilityAttribute()
465 LVComputationKind computation) { in mergeTemplateLV() argument
753 computation.isValueVisibility() in getLVForNamespaceScopeDecl()
824 mergeTemplateLV(LV, spec, computation); in getLVForNamespaceScopeDecl()
1355 LV = getLVForDecl(FD, computation); in getLVForLocalDecl()
1367 computation.isValueVisibility() in getLVForLocalDecl()
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H A DAPValue.cpp1107 LVComputationKind computation) { in getLVForValue() argument
1115 return MergeLV(getLVForValue(V, computation)); in getLVForValue()
1163 if (VD && MergeLV(getLVForDecl(VD, computation))) in getLVForValue()
1166 if (MergeLV(getLVForType(*TI.getType(), computation))) in getLVForValue()
1178 if (MergeLV(getLVForDecl(MTE->getExtendingDecl(), computation))) in getLVForValue()
1192 MergeLV(getLVForDecl(D, computation)); in getLVForValue()
/llvm-project-15.0.7/flang/test/Fir/
H A Drebox-susbtring.fir19 // Only test the computation of the base address offset computation accounting for the substring
31 // More offset computation with descriptor strides and triplets that is not character specific ...
52 // Only test the computation of the base address offset computation accounting for the substring of…
65 // More offset computation with descriptor strides and triplets that is not character specific ...
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVSchedule.td41 def WriteFALU16 : SchedWrite; // FP 16-bit computation
42 def WriteFALU32 : SchedWrite; // FP 32-bit computation
43 def WriteFALU64 : SchedWrite; // FP 64-bit computation
133 def ReadFALU16 : SchedRead; // FP 16-bit computation
134 def ReadFALU32 : SchedRead; // FP 32-bit computation
135 def ReadFALU64 : SchedRead; // FP 64-bit computation
/llvm-project-15.0.7/compiler-rt/test/sanitizer_common/TestCases/Posix/
H A Dprint-module-map.cpp29 int computation = value / 0; // Division by zero. in main() local
/llvm-project-15.0.7/mlir/docs/
H A DQuantization.md70 computation. Frequently, real values that will be encountered are not
72 is encountered during computation, and should thus be represented.
184 instrumentation points within the computation where runtime statistics
221 the computation. stats_ref ops are generally converted to statistical operations once
223 * coupled_ref : Declares points in the computation to be coupled from a type
245 flexibility to move the casts as it simplifies the computation and converts it
/llvm-project-15.0.7/llvm/docs/
H A DGetElementPtr.rst62 computation. The second operand to the GEP instruction must be a value of a
132 result in the computation of addresses that point to memory past the end of the
179 only involved in the computation of addresses. For example, consider this:
215 are different (0 and 1), therefore the address computation diverges with that
280 However, for the underlying integer computation implied, there is no
287 You don't. The integer computation implied by a GEP is target-independent.
334 valid to compute arbitrary element indices, as the computation only depends on
375 underlying integer computation. They need not correspond with the actual type of
390 The underlying integer computation is sufficiently defined; null has a defined
423 What happens if a GEP computation overflows?
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/llvm-project-15.0.7/polly/lib/External/isl/test_inputs/schedule/
H A Ddisjunctive_domain.sc1 # Check that the size computation used for loop coalescing avoidance
/llvm-project-15.0.7/polly/lib/External/ppcg/
H A DChangeLog18 - fix live-out computation
/llvm-project-15.0.7/llvm/test/Instrumentation/AddressSanitizer/
H A Dforce-dynamic-shadow.ll16 ; Shadow address is loaded and added into the whole offset computation.
H A Dbasic-msvc64.ll15 ; Shadow address is loaded and added into the whole offset computation.
/llvm-project-15.0.7/llvm/test/Bitcode/
H A Dthinlto-deadstrip-flag.ll11 ; when option used to disable dead stripping computation.
/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Dfast-isel-pr47040.ll4 ; triggered during FastISel's address computation. The issue was that
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dlea-2.ll7 ; The computation of %t4 should match a single lea, without using actual add instructions.
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dat-least-one-def-value-assert.mir15 # LiveInterval computation, which was more confusing. The invalid
/llvm-project-15.0.7/mlir/include/mlir/Dialect/MLProgram/IR/
H A DMLProgramBase.td21 define computation ops common to such frameworks but establishes a common
/llvm-project-15.0.7/llvm/test/Transforms/SimplifyCFG/
H A DPhiEliminate.ll3 ; be able to fold PHI nodes into computation in common cases. Folding the PHI
/llvm-project-15.0.7/mlir/test/Integration/Dialect/SparseTensor/taco/
H A DREADME.md10 computation, and invokes the MLIR sparse tensor code generator
/llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/
H A Dlftr_disabled.ll4 ; LFTR should not eliminate the need for the computation of i*i completely
/llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/
H A D2008-11-18-Stride1.ll9 ; be teaching it how to use a more elaborate trip count computation.
H A Dpr48225.ll11 ; condition in the computation logic. It should be 2.
58 ; condition in the computation logic. It should be 2.
/llvm-project-15.0.7/llvm/test/Transforms/IROutliner/
H A Doutlining-commutative-operands-opposite-order.ll7 ; later on in the computation.
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dfast-isel-load-store-vsx.ll5 ;; address computation will use zero regardless of the content of R0. If used as
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dswp-maxstart.ll3 ; Test that the MinStart computation, which is based upon the length

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