Searched refs:code_properties (Results 1 – 5 of 5) sorted by relevance
1102 Out.code_properties |= AMD_CODE_PROPERTY_IS_PTR64; in getAmdKernelCode()1105 Out.code_properties |= AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK; in getAmdKernelCode()1107 AMD_HSA_BITS_SET(Out.code_properties, in getAmdKernelCode()1112 Out.code_properties |= in getAmdKernelCode()1117 Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR; in getAmdKernelCode()1120 Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR; in getAmdKernelCode()1123 Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR; in getAmdKernelCode()1126 Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID; in getAmdKernelCode()1129 Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT; in getAmdKernelCode()1132 Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR; in getAmdKernelCode()[all …]
562 uint32_t code_properties; member
25 printBitField<FLD_T(code_properties),\30 parseBitField<FLD_T(code_properties),\
935 Header.code_properties |= AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32; in initDefaultAMDKernelCodeT()
5307 if (Header.code_properties & AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32) { in ParseAMDKernelCodeTValue()