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/llvm-project-15.0.7/llvm/utils/lit/lit/
H A DProgressBar.py240 self.cleared = 1 #: true if we haven't drawn the bar yet.
247 if self.cleared:
249 self.cleared = 0
279 if not self.cleared:
287 self.cleared = 1
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dpr3216.ll13 %bf.lo.cleared = and i8 %bf.lo, 7
14 %1 = shl i8 %bf.lo.cleared, 5
H A D2009-04-25-CoalescerBug.ll23 %bf.lo.cleared = and i32 %bf.lo, 2147483647 ; <i32> [#uses=1]
24 %conv = zext i32 %bf.lo.cleared to i64 ; <i64> [#uses=1]
H A Dvirtual-registers-cleared-in-machine-functions-liveins.ll5 ; liveins are cleared after register allocation.
H A DtargetLoweringGeneric.ll12 ; into an AND, as we know the bits will be cleared.
/llvm-project-15.0.7/llvm/test/Transforms/Inline/
H A Dpr52118.ll1 ; Test that the InlineAdvisor, upon being cleared, is re-created correctly.
/llvm-project-15.0.7/llvm/test/DebugInfo/MIR/X86/
H A Dmachinesink-subreg.mir4 # instruction is cleared when marking the debug value undef.
61 ; index in the DBG_VALUE is cleared.
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiInstrFormats.td64 // is set if the result is zero and cleared otherwise.
72 // the same but different from the sign bit of the result and cleared
73 // otherwise. For other RI instructions, `V' is cleared.
76 // For arithmetic instructions, `C' is set/cleared if there is/is_not
81 // operations, `C' is cleared.
139 // is cleared. Only arithmetic instructions and shifts modify `C'. Right
309 // 0100 C' [CC, carry cleared]
313 // 1000 V' [VC, oVerflow cleared]
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Ddef-undef-deps.ll8 ; The undef flags are already being cleared in the register cleanup, but
9 ; that happens after register allocation. The undef flags need to be cleared
H A Drdf-copy-renamable-reserved.mir4 # flag is cleared.
H A Difcvt-common-kill.mir18 ; This <kill> flag should be cleared. It didn't use to be, because
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BtVer2/
H A Dclear-super-register-1.s8 ## The upper portion of RAX is cleared.
H A Dclear-super-register-2.s8 # YMM3 is implicitly cleared. As a consequence, the definition of YMM3 from the
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BdVer2/
H A Dclear-super-register-1.s8 ## The upper portion of RAX is cleared.
H A Dclear-super-register-2.s8 # YMM3 is implicitly cleared. As a consequence, the definition of YMM3 from the
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/Barcelona/
H A Dclear-super-register-1.s8 ## The upper portion of RAX is cleared.
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/readability/
H A Dduplicate-include.rst8 then the list of included files is cleared.
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dmachine_cse_impdef_killflags.ll4 ; Check that the kill flag is cleared between CSE'd instructions on their
H A Dmachine-sink-kill-flags.ll9 ; The kill flags on the test had to be cleared because the AND was going to read
/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dinsn-directive.s58 # Verify that .insn causes the currently saved labels to be cleared by checking
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dearly-tailduplicator-nophis.mir5 # so the NoPHIs property needs to be cleared to avoid verifier errors
/llvm-project-15.0.7/clang/test/Analysis/
H A Dmisc-ps-eager-assume.m135 // Note: CheckerVisit mistakenly cleared an existing node, and the cleared
/llvm-project-15.0.7/compiler-rt/lib/lsan/
H A Dlsan_allocator.cpp86 bool cleared) { in Allocate() argument
104 if (cleared && allocator.FromPrimary(p)) in Allocate()
H A Dlsan_allocator.h25 bool cleared);
/llvm-project-15.0.7/llvm/test/Transforms/SCCP/
H A Dipsccp-clear-returned.ll3 ; should be cleared.

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