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Searched refs:cas (Results 1 – 25 of 25) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Datomicrmw-expand.ll9 ; SM30: atom.cas.b64
40 ; SM30: atom.cas.b64
43 ; SM30: atom.cas.b64
46 ; SM30: atom.cas.b64
49 ; SM30: atom.cas.b64
72 ; SM30: atom.cas.b64
96 ; ALL: atom.cas.b32
104 ; ALL: atom.cas.b32
106 ; ALL: atom.cas.b32
108 ; ALL: atom.cas.b32
[all …]
H A Datomics-with-scope.ll94 ; CHECK: atom.cta.cas.b32
96 ; CHECK: atom.cta.cas.b64
98 ; CHECK: atom.sys.cas.b32
100 ; CHECK: atom.sys.cas.b64
134 ; CHECK: atom.cta.cas.b32{{.*}}], %r{{[0-9+]}}, %r{{[0-9+]}};
137 ; CHECK32: atom.cta.cas.b32{{.*}}], %r{{[0-9+]}}, 51;
139 ; CHECK: atom.cta.cas.b32{{.*}}], 52, %r{{[0-9+]}};
141 ; CHECK: atom.cta.cas.b32{{.*}}], 53, 54;
184 declare i32 @llvm.nvvm.atomic.cas.gen.i.cta.i32.p0i32(i32* nocapture, i32, i32) #1
185 declare i64 @llvm.nvvm.atomic.cas.gen.i.cta.i64.p0i64(i64* nocapture, i64, i64) #1
[all …]
H A Datomics.ll194 ; CHECK: atom.cas.b32
201 ; CHECK: atom.cas.b64
/llvm-project-15.0.7/llvm/test/MC/VE/
H A DCAS.s6 # CHECK-INST: cas.l %s20, 20(%s11), %s32
8 cas.l %s20, 20(%s11), %s32
10 # CHECK-INST: cas.w %s20, 8192, 63
12 cas.w %s20, 8192, 63
14 # CHECK-INST: cas.w %s20, 8192, -64
16 cas.w %s20, 8192, -64
/llvm-project-15.0.7/llvm/test/CodeGen/SPARC/
H A Datomics.ll74 ; CHECK: cas [%o2], %g4, %g3
115 ; CHECK: cas [%o2], %g4, %g3
149 ; CHECK: cas
159 ; CHECK: cas
181 ; CHECK: cas [{{%[gilo][0-7]}}]
193 ; CHECK: cas [{{%[gilo][0-7]}}]
206 ; CHECK: cas [%o0], [[V]], [[V2]]
217 ; CHECK: cas [%o0]
229 ; CHECK: cas [%o0]
241 ; CHECK: cas [%o0]
[all …]
/llvm-project-15.0.7/compiler-rt/test/tsan/
H A Dreal_deadlock_detector_stress_test.cpp36 bool cas(int *a, int oldval, int newval) { in cas() function
69 if (cas(&m->state, old, newv)) { in Thread()
75 if (!cas(&m->state, kStateLocked, 1)) { in Thread()
142 if (!cas(&m->state, kStateInited, kStateLocked)) { in Thread()
150 if (!cas(&m->state, kStateLocked, kStateNotInited)) { in Thread()
/llvm-project-15.0.7/llvm/test/MC/Sparc/
H A Dsparcv9-atomic-instructions.s15 ! CHECK: cas [%i0], %l6, %o2 ! encoding: [0xd5,0xe6,0x10,0x16]
16 cas [%i0], %l6, %o2
/llvm-project-15.0.7/llvm/test/CodeGen/VE/Scalar/
H A Datomic.ll29 ; CHECK-NEXT: cas.w %s2, (%s0), %s3
60 ; CHECK-NEXT: cas.w %s2, (%s0), %s3
85 ; CHECK-NEXT: cas.w %s1, (%s0), %s2
108 ; CHECK-NEXT: cas.l %s0, (%s1), %s2
132 ; CHECK-NEXT: cas.w %s0, (%s1), %s2
165 ; CHECK-NEXT: cas.w %s2, (%s0), %s4
191 ; CHECK-NEXT: cas.w %s0, (%s1), %s3
218 ; CHECK-NEXT: cas.w %s1, (%s0), %s3
245 ; CHECK-NEXT: cas.w %s1, (%s0), %s3
272 ; CHECK-NEXT: cas.w %s1, (%s0), %s3
H A Datomic_cmp_swap.ll94 ; CHECK-NEXT: cas.w %s2, (%s4), %s5
138 ; CHECK-NEXT: cas.w %s2, (%s4), %s5
181 ; CHECK-NEXT: cas.w %s2, (%s4), %s5
225 ; CHECK-NEXT: cas.w %s2, (%s4), %s5
268 ; CHECK-NEXT: cas.w %s2, (%s4), %s5
301 ; CHECK-NEXT: cas.w %s2, (%s0), %s3
332 ; CHECK-NEXT: cas.w %s2, (%s0), %s3
363 ; CHECK-NEXT: cas.l %s2, (%s0), %s3
394 ; CHECK-NEXT: cas.l %s2, (%s0), %s3
497 ; CHECK-NEXT: cas.w %s2, (%s4), %s5
[all …]
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Darmv8.1a-atomic.s37 cas w0, w1, [x2]
47 cas w0, w1, [w2]
58 cas x0, x1, [x2]
H A Darmv8.1a-lse.s13 cas w0, w1, [x2]
14 cas w2, w3, [sp]
64 cas x0, x1, [x2]
65 cas x2, x3, [sp]
982 cas b0, b1, [x2]
987 cas b2, b3, [sp]
992 cas h0, h1, [x2]
997 cas h2, h3, [sp]
1184 cas v0.4h, v1.4h, v2.4h
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dcas.ll4 ;bool cas(float volatile *p, ptr expected, float desired) {
18 define zeroext i1 @cas(ptr %p, ptr %expected, float %desired) nounwind {
39 ; CHECK: @cas
/llvm-project-15.0.7/compiler-rt/lib/builtins/aarch64/
H A Dlse.S120 DEFINE_COMPILERRT_OUTLINE_FUNCTION_UNMANGLED(NAME(cas))
124 #define CAS GLUE4(cas, A, L, S) s(0), s(1), [x2]
164 END_COMPILERRT_OUTLINE_FUNCTION(NAME(cas))
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AArch64/
H A Darmv8.1a-atomic.txt28 # CHECK: cas w0, w1, [x2]
32 # CHECK: cas x0, x1, [x2]
/llvm-project-15.0.7/llvm/test/Transforms/InferAddressSpaces/AMDGPU/
H A Dbasic.ll166 ; CHECK: %ret = cmpxchg i32* addrspace(3)* %cas.ptr, i32* %cast.cmp, i32* %val seq_cst monotonic
167 define { i32*, i1 } @cmpxchg_group_to_flat_wrong_operand(i32* addrspace(3)* %cas.ptr, i32 addrspace…
169 %ret = cmpxchg i32* addrspace(3)* %cas.ptr, i32* %cast.cmp, i32* %val seq_cst monotonic
/llvm-project-15.0.7/llvm/test/Transforms/SimpleLoopUnswitch/
H A Dinfinite-loop.ll9 ; It can trivially unswitch on the false cas of condition %a though.
/llvm-project-15.0.7/llvm/utils/gn/secondary/compiler-rt/lib/builtins/
H A DBUILD.gn14 "cas",
36 if (pat == "cas" || size != "16") {
/llvm-project-15.0.7/compiler-rt/cmake/
H A Dbuiltin-config-ix.cmake44 asm(\"cas w0, w1, [x2]\");
/llvm-project-15.0.7/compiler-rt/lib/builtins/
H A DCMakeLists.txt539 foreach(pat cas swp ldadd ldclr ldeor ldset)
542 if(pat STREQUAL "cas" OR NOT size STREQUAL "16")
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXIntrinsics.td1890 defm INT_PTX_ATOM_CAS_G_32 : F_ATOMIC_3<Int32Regs, ".global", ".b32", ".cas",
1892 defm INT_PTX_ATOM_CAS_S_32 : F_ATOMIC_3<Int32Regs, ".shared", ".b32", ".cas",
1894 defm INT_PTX_ATOM_CAS_GEN_32 : F_ATOMIC_3<Int32Regs, "", ".b32", ".cas",
1897 ".cas", atomic_cmp_swap_32_gen, i32imm>;
1898 defm INT_PTX_ATOM_CAS_G_64 : F_ATOMIC_3<Int64Regs, ".global", ".b64", ".cas",
1900 defm INT_PTX_ATOM_CAS_S_64 : F_ATOMIC_3<Int64Regs, ".shared", ".b64", ".cas",
1902 defm INT_PTX_ATOM_CAS_GEN_64 : F_ATOMIC_3<Int64Regs, "", ".b64", ".cas",
1905 ".cas", atomic_cmp_swap_64_gen, i64imm>;
2089 // atom.cas
2097 defm INT_PTX_SATOM_CAS : ATOM3_cas_impl<"cas">;
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEInstrInfo.td1142 defm CASL : RRCASm<"cas.l", 0x62, I64, i64, simm7, atomic_cmp_swap_64>;
1144 defm CASW : RRCASm<"cas.w", 0x62, I32, i32, simm7, atomic_cmp_swap_32>;
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.td1643 "cas [$rs1], $rs2, $rd",
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Darm64-atomic.ll297 ; CHECK-LSE-O1-NEXT: cas x1, x2, [x0]
305 ; CHECK-LSE-O0-NEXT: cas x0, x2, [x8]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Datomic-ops-lse.ll3465 ; CHECK: cas w0, w1, [x[[ADDR]]]
3488 ; CHECK: cas x0, x1, [x[[ADDR]]]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrFormats.td11205 "cas" # order # size, "\t$Rs, $Rt, [$Rn]",