| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| H A D | combine-rot.mir | 20 %bw:_(s32) = G_CONSTANT i32 32 22 %sub:_(s32) = G_SUB %bw, %amt 47 %sub:_(<2 x s32>) = G_SUB %bw, %amt 69 %bw:_(s32) = G_CONSTANT i32 32 71 %sub:_(s32) = G_SUB %bw, %amt 93 %bw:_(s32) = G_CONSTANT i32 32 95 %sub:_(s32) = G_SUB %bw, %amt 197 %bw:_(s32) = G_CONSTANT i32 31 199 %sub:_(s32) = G_SUB %bw, %amt 227 %bw:_(s32) = G_CONSTANT i32 32 [all …]
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| H A D | combine-fsh.mir | 22 %bw:_(s32) = G_CONSTANT i32 32 24 %sub:_(s32) = G_SUB %bw, %amt 51 %sub:_(<2 x s32>) = G_SUB %bw, %amt 75 %bw:_(s32) = G_CONSTANT i32 32 77 %sub:_(s32) = G_SUB %bw, %amt 101 %bw:_(s32) = G_CONSTANT i32 32 103 %sub:_(s32) = G_SUB %bw, %amt 212 %bw:_(s32) = G_CONSTANT i32 31 214 %sub:_(s32) = G_SUB %bw, %amt 244 %bw:_(s32) = G_CONSTANT i32 32 [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | coff-comdat.ll | 76 ; CHECK: .section .bss,"bw",associative,_f1 78 ; CHECK: .section .bss,"bw",associative,_f2 80 ; CHECK: .section .bss,"bw",associative,_f3 82 ; CHECK: .section .bss,"bw",associative,_f4 84 ; CHECK: .section .bss,"bw",associative,_f5 86 ; CHECK: .section .bss,"bw",associative,_f6 88 ; CHECK: .section .bss,"bw",same_size,_f6
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| H A D | psadbw.ll | 11 %3 = tail call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %0, <16 x i8> %1) 32 %5 = tail call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %3, <16 x i8> %4) 37 declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>)
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| H A D | llc-override-mcpu-mattr.ll | 15 %2 = tail call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %0, <32 x i8> %1) 19 declare <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8>, <32 x i8>)
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| H A D | fixup-bw-copy.mir | 1 # RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o - %s | FileCheck %s
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| H A D | vector-shuffle-combining-avx512bwvl.ll | 192 %i275 = call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> undef, <16 x i8> zeroinitializer) 193 %i277 = call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> undef, <16 x i8> zeroinitializer) 213 declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>)
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| H A D | fixup-bw-inst.mir | 1 # RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass x86-fixup-bw-insts %s -o - | FileCheck %s
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| /llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/ |
| H A D | solve-quadratic.ll | 45 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: addrec coeff bw: 4 46 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: equation -2x^2 + -2x + -4, coeff bw: 5, multiplied by 2 77 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: addrec coeff bw: 32 121 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: addrec coeff bw: 4 122 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: equation 2x^2 + -4x + 2, coeff bw: 5, multiplied by 2 178 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: addrec coeff bw: 16 197 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: addrec coeff bw: 16 228 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: addrec coeff bw: 32 272 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: addrec coeff bw: 32 319 ; CHECK: {{.*}}GetQuadraticEquation{{.*}}: addrec coeff bw: 32 [all …]
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| /llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/Mips/ |
| H A D | pr35209.ll | 26 %bw = getelementptr inbounds %struct.az, %struct.az* %0, i64 0, i32 1 36 %2 = load %struct.bt*, %struct.bt** %bw, align 8 42 %4 = load %struct.bt*, %struct.bt** %bw, align 8 52 ; CHECK-NOT: %{{[0-9]+}} = load %struct.bt*, %struct.bt** %bw 54 ; CHECK-NOT: %{{[0-9]+}} = load %struct.bt*, %struct.bt** %bw
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| /llvm-project-15.0.7/llvm/test/Instrumentation/MemorySanitizer/ |
| H A D | vector_arith.ll | 10 declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>) nounwind readnone 11 declare x86_mmx @llvm.x86.mmx.psad.bw(x86_mmx, x86_mmx) nounwind readnone 43 %c = tail call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %a, <16 x i8> %b) 58 %c = tail call x86_mmx @llvm.x86.mmx.psad.bw(x86_mmx %a, x86_mmx %b) nounwind
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | carry.ll | 32 %bw = zext i32 %bl to i64 33 %cw = add i64 %aw, %bw 36 %dw = add i64 %ch, %bw
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| /llvm-project-15.0.7/clang/test/CodeGenCoroutines/ |
| H A D | coro-return-voidtype-initlist.cpp | 72 int bw(0); in bo() local 74 co_return{0, co_await ax(bu, bw)}; in bo()
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| H A D | coro-return-voidtype-initlist-exp-namespace.cpp | 74 int bw(0); in bo() local 76 co_return {0, co_await ax(bu, bw)}; in bo()
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| /llvm-project-15.0.7/llvm/test/DebugInfo/MIR/InstrRef/ |
| H A D | x86-fixup-bw-inst-subreb.mir | 1 # RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass x86-fixup-bw-insts %s -o - -experimental-deb… 3 # This test is a copy of llvm/test/CodeGen/X86/fixup-bw-inst.mir, with a few
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| /llvm-project-15.0.7/llvm/test/MC/COFF/ |
| H A D | bss_section.ll | 10 ; CHECK: .section .bss,"bw",discard,_thingy_linkonce
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| /llvm-project-15.0.7/llvm/test/Transforms/Float2Int/ |
| H A D | toolarge.ll | 1 ; RUN: opt < %s -passes=float2int -float2int-max-integer-bw=256 -S | FileCheck %s
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| /llvm-project-15.0.7/clang/test/Lexer/ |
| H A D | bitint-constants.c | 107 0bw; // expected-error {{invalid digit 'b' in octal constant}} in InvalidSuffix()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrExtension.td | 40 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, 44 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, 66 "movz{bw|x}\t{$src, $dst|$dst, $src}", []>, 70 "movz{bw|x}\t{$src, $dst|$dst, $src}", []>,
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrFormats.td | 46 class IForm<bits<4> opcode, DestMode ad, bit bw, SourceMode as, int size, 57 let Inst{6} = bw; 317 class IIForm<bits<3> opcode, bit bw, SourceMode as, int size, 326 let Inst{6} = bw;
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| /llvm-project-15.0.7/mlir/lib/Conversion/ArithmeticToSPIRV/ |
| H A D | ArithmeticToSPIRV.cpp | 283 unsigned bw = 0; in hasSameBitwidth() local 285 bw = type.getIntOrFloatBitWidth(); in hasSameBitwidth() 287 bw = vecType.getElementTypeBitWidth() * vecType.getNumElements(); in hasSameBitwidth() 288 return bw; in hasSameBitwidth()
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | funnel.ll | 161 ; Fold or(shl(x,a),lshr(y,bw-a)) -> fshl(x,y,a) iff a < bw 176 ; Fold or(lshr(v,a),shl(v,bw-a)) -> fshr(y,x,a) iff a < bw
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| H A D | or-concat.ll | 6 ; or(zext(OP(x)), shl(zext(OP(y)),bw/2)) 8 ; OP(or(zext(x), shl(zext(y),bw/2)))
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| H A D | fold-vector-select.ll | 69 …%bw = select <4 x i1> <i1 false, i1 false, i1 false, i1 false>, <4 x i32> zeroinitializer, <4 x i3… 133 store <4 x i32> %bw, <4 x i32>* %BW
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| H A D | rotate.ll | 725 ; Fold or(shl(v,x),lshr(v,bw-x)) iff x < bw 740 ; Fold or(lshr(v,x),shl(v,bw-x)) iff x < bw
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