Searched refs:buildMul (Results 1 – 7 of 7) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUAtomicOptimizer.cpp | 454 static Value *buildMul(IRBuilder<> &B, Value *LHS, Value *RHS) { in buildMul() function 572 NewV = buildMul(B, V, Ctpop); in optimizeAtomic() 592 NewV = buildMul(B, V, B.CreateAnd(Ctpop, 1)); in optimizeAtomic() 671 LaneOffset = buildMul(B, V, Mbcnt); in optimizeAtomic() 682 LaneOffset = buildMul(B, V, B.CreateAnd(Mbcnt, 1)); in optimizeAtomic()
|
| H A D | AMDGPULegalizerInfo.cpp | 3005 auto Mul = B.buildMul(S32, Src0[j0], Src1[j1]); in buildMultiply() 3462 auto NegYZ = B.buildMul(S32, NegY, Z); in legalizeUnsignedDIV_REM32Impl() 3467 auto R = B.buildSub(S32, X, B.buildMul(S32, Q, Y)); in legalizeUnsignedDIV_REM32Impl() 3545 auto MulLo1 = B.buildMul(S64, NegDenom, Rcp); in legalizeUnsignedDIV_REM64Impl() 3556 auto MulLo2 = B.buildMul(S64, NegDenom, Add1); in legalizeUnsignedDIV_REM64Impl() 3572 auto Mul3 = B.buildMul(S64, Denom, MulHi3); in legalizeUnsignedDIV_REM64Impl()
|
| H A D | AMDGPURegisterBankInfo.cpp | 1591 Register DstLo = B.buildMul(S32, Src0, Src1).getReg(0); in applyMappingMAD_64_32()
|
| /llvm-project-15.0.7/llvm/unittests/CodeGen/GlobalISel/ |
| H A D | PatternMatchTest.cpp | 124 auto MIBMul = B.buildMul(s64, MIBAdd, Copies[2]); in TEST_F() 142 auto MIBMul2 = B.buildMul(s64, Copies[0], B.buildConstant(s64, 42)); in TEST_F()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 2765 auto NewBaseIdx = MIRBuilder.buildMul(IdxTy, Idx, NewEltsPerOldEltK); in bitcastExtractVectorElt() 3255 auto Prod = MIRBuilder.buildMul(Ty, Quot, MI.getOperand(2)); in lower() 3591 auto Mul = MIRBuilder.buildMul(IdxTy, Index, in getVectorElementPointer() 4978 B.buildMul(NarrowTy, Src1Regs[DstIdx], Src2Regs[DstIdx]).getReg(0); in multiplyRegisters() 4989 B.buildMul(NarrowTy, Src1Regs[DstIdx - i], Src2Regs[i]); in multiplyRegisters() 5690 auto ResTmp = B.buildMul(Ty, B8Count, MulMask); in lowerBitCount() 7208 auto Mul = MIRBuilder.buildMul(WideTy, LHS, RHS); in lowerSMULH_UMULH() 7436 Val = MIB.buildMul(ExtType, ZExt, MagicMI).getReg(0); in getMemsetValue()
|
| H A D | IRTranslator.cpp | 1562 MIRBuilder.buildMul(OffsetTy, IdxReg, ElementSizeMIB).getReg(0); in translateGetElementPtr() 2726 MIRBuilder.buildMul(AllocSize, NumElts, TySize); in translateAlloca()
|
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 1507 MachineInstrBuilder buildMul(const DstOp &Dst, const SrcOp &Src0,
|