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Searched refs:bitwidth (Results 1 – 25 of 133) sorted by relevance

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/llvm-project-15.0.7/flang/include/flang/Optimizer/Support/
H A DTypeCode.h26 inline int characterBitsToTypeCode(unsigned bitwidth) { in characterBitsToTypeCode() argument
28 switch (bitwidth) { in characterBitsToTypeCode()
37 inline int complexBitsToTypeCode(unsigned bitwidth) { in complexBitsToTypeCode() argument
39 switch (bitwidth) { in complexBitsToTypeCode()
50 inline int integerBitsToTypeCode(unsigned bitwidth) { in integerBitsToTypeCode() argument
52 switch (bitwidth) { in integerBitsToTypeCode()
63 inline int logicalBitsToTypeCode(unsigned bitwidth) { in logicalBitsToTypeCode() argument
65 switch (bitwidth) { in logicalBitsToTypeCode()
75 inline int realBitsToTypeCode(unsigned bitwidth) { in realBitsToTypeCode() argument
77 switch (bitwidth) { in realBitsToTypeCode()
/llvm-project-15.0.7/mlir/include/mlir/Conversion/LLVMCommon/
H A DLoweringOptions.h59 void overrideIndexBitwidth(unsigned bitwidth) { in overrideIndexBitwidth() argument
60 assert(bitwidth != kDeriveIndexBitwidthFromDataLayout && in overrideIndexBitwidth()
62 indexBitwidth = bitwidth; in overrideIndexBitwidth()
/llvm-project-15.0.7/mlir/test/Dialect/SparseTensor/
H A Dinvalid_encoding.mlir38 …ensor.encoding<{pointerBitWidth = "x"}> // expected-error {{expected an integral pointer bitwidth}}
43 …parse_tensor.encoding<{pointerBitWidth = 42}> // expected-error {{unexpected pointer bitwidth: 42}}
48 ….encoding<{indexBitWidth = "not really"}> // expected-error {{expected an integral index bitwidth}}
53 #a = #sparse_tensor.encoding<{indexBitWidth = 128}> // expected-error {{unexpected index bitwidth: …
/llvm-project-15.0.7/llvm/test/tools/llvm-ifs/
H A Dwrite-stub.test3 # RUN: llvm-ifs --output-elf=%t.elf32l --arch=x86_64 --bitwidth=32 --endianness=little %s
6 # RUN: llvm-ifs --output-elf=%t.elf32b --arch=x86_64 --bitwidth=32 --endianness=big %s
9 # RUN: llvm-ifs --output-elf=%t.elf64l --arch=x86_64 --bitwidth=64 --endianness=little %s
15 # RUN: llvm-ifs --output-elf=%t.elf64b --arch=x86_64 --bitwidth=64 --endianness=big %s
18 # RUN: not llvm-ifs --output-elf=%t --arch=x86_64 --bitwidth=64 --endianness=big --target=x86_64-li…
20 # RUN: not llvm-ifs --output-elf=%t --bitwidth=64 --endianness=big %s 2>&1 | FileCheck %s -DMSG="Ar…
24 # RUN: not llvm-ifs --output-elf=%t --arch=x86_64 --bitwidth=64 %s 2>&1 | FileCheck %s -DMSG="Endia…
29 # RUN: llvm-ifs --output-ifs=%t.target --arch=x86_64 --endianness=little --bitwidth=64 %s
32 # RUN: not llvm-ifs --output-elf=%t --bitwidth=32 %t.target 2>&1 | FileCheck %s -DMSG=BitWidth --ch…
H A Dstrip-target.test4 # RUN: llvm-ifs --input-format=ELF --strip-ifs-arch --strip-ifs-endianness --strip-ifs-bitwidth --o…
7 # RUN: llvm-ifs --input-format=ELF --strip-ifs-bitwidth --output-ifs=- %p/Inputs/sysv_hash.so | Fil…
H A Difs-elf-conversion.test3 # RUN: llvm-ifs --output-elf=%t.elf64l --arch=x86_64 --bitwidth=64 --endianness=little %s
/llvm-project-15.0.7/mlir/lib/Conversion/MathToSPIRV/
H A DMathToSPIRV.cpp79 int bitwidth = floatType.getWidth(); in matchAndRewrite() local
80 Type intType = rewriter.getIntegerType(bitwidth); in matchAndRewrite()
81 uint64_t intValue = uint64_t(1) << (bitwidth - 1); in matchAndRewrite()
136 unsigned bitwidth = 0; in matchAndRewrite() local
138 bitwidth = type.getIntOrFloatBitWidth(); in matchAndRewrite()
140 bitwidth = vectorType.getElementTypeBitWidth(); in matchAndRewrite()
141 if (bitwidth != 32) in matchAndRewrite()
/llvm-project-15.0.7/mlir/lib/CAPI/IR/
H A DBuiltinTypes.cpp29 MlirType mlirIntegerTypeGet(MlirContext ctx, unsigned bitwidth) { in mlirIntegerTypeGet() argument
30 return wrap(IntegerType::get(unwrap(ctx), bitwidth)); in mlirIntegerTypeGet()
33 MlirType mlirIntegerTypeSignedGet(MlirContext ctx, unsigned bitwidth) { in mlirIntegerTypeSignedGet() argument
34 return wrap(IntegerType::get(unwrap(ctx), bitwidth, IntegerType::Signed)); in mlirIntegerTypeSignedGet()
37 MlirType mlirIntegerTypeUnsignedGet(MlirContext ctx, unsigned bitwidth) { in mlirIntegerTypeUnsignedGet() argument
38 return wrap(IntegerType::get(unwrap(ctx), bitwidth, IntegerType::Unsigned)); in mlirIntegerTypeUnsignedGet()
/llvm-project-15.0.7/llvm/test/Transforms/HardwareLoops/
H A Dunconditional-latch.ll1 ; RUN: opt -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32…
2 ; RUN: opt -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32…
3 ; RUN: opt -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32…
H A Dunscevable.ll1 …e-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -S %s -o - | F…
2 …e-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -force-hardwar…
3 …e-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -force-nested-…
/llvm-project-15.0.7/mlir/lib/Interfaces/
H A DInferIntRangeInterface.cpp38 ConstantIntRanges ConstantIntRanges::maxRange(unsigned bitwidth) { in maxRange() argument
39 return fromUnsigned(APInt::getZero(bitwidth), APInt::getMaxValue(bitwidth)); in maxRange()
/llvm-project-15.0.7/mlir/lib/Dialect/X86Vector/Transforms/
H A DLegalizeForLLVMExport.cpp52 unsigned bitwidth = elementType.getIntOrFloatBitWidth(); in matchAndRewrite() local
53 if (bitwidth == 32) in matchAndRewrite()
57 if (bitwidth == 64) in matchAndRewrite()
/llvm-project-15.0.7/llvm/tools/llvm-ifs/
H A DOpts.td12 defm bitwidth : Eq<"bitwidth", "Specify the bit width">;
28 def strip_ifs_bitwidth : FF<"strip-ifs-bitwidth", "Strip target bit width information away from IFS…
/llvm-project-15.0.7/llvm/test/Verifier/
H A Dstepvector-intrinsic.ll14 ; CHECK: experimental_stepvector only supported for vectors of integers with a bitwidth of at least…
22 ; CHECK: experimental_stepvector only supported for vectors of integers with a bitwidth of at least…
/llvm-project-15.0.7/mlir/lib/Conversion/SCFToOpenMP/
H A DSCFToOpenMP.cpp162 unsigned bitwidth = intType.getWidth(); in minMaxValueForSignedInt() local
163 return IntegerAttr::get(type, min ? llvm::APInt::getSignedMinValue(bitwidth) in minMaxValueForSignedInt()
164 : llvm::APInt::getSignedMaxValue(bitwidth)); in minMaxValueForSignedInt()
172 unsigned bitwidth = intType.getWidth(); in minMaxValueForUnsignedInt() local
173 return IntegerAttr::get(type, min ? llvm::APInt::getNullValue(bitwidth) in minMaxValueForUnsignedInt()
174 : llvm::APInt::getAllOnesValue(bitwidth)); in minMaxValueForUnsignedInt()
/llvm-project-15.0.7/mlir/include/mlir-c/
H A DBuiltinTypes.h31 unsigned bitwidth);
36 unsigned bitwidth);
41 unsigned bitwidth);
/llvm-project-15.0.7/mlir/test/Dialect/SPIRV/IR/
H A Dcast-ops.mlir54 // expected-error @+1 {{mismatch in result type bitwidth 64 and operand type bitwidth 32}}
62 // expected-error @+1 {{mismatch in result type bitwidth 96 and operand type bitwidth 64}}
/llvm-project-15.0.7/mlir/docs/
H A DDataLayout.md130 example, `IntegerType{signedness=signless, bitwidth=8}` (or `i8` in the IR) or
131 `IntegerType{signedness=unsigned, bitwidth=32}` (or `ui32` in the IR). When
140 bitwidth.
233 `ceildiv(bitwidth, 8)`. The ABI alignment of integer types with bitwidth below
235 bytes. The ABI alignment of integer types with bitwidth 64 and above is 4 bytes
260 data layout entry that specifies its bitwidth. For example,
269 those of the integer type with the same bitwidth defined above.
/llvm-project-15.0.7/llvm/test/Transforms/WholeProgramDevirt/
H A Dvcp-type-mismatch.ll5 ; to optimize. For bitwidth mismatches, we allow the optimization in order
6 ; to simplify the implementation. This is legal because the bitwidth mismatch
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dfastisel-gep-promote-before-add.ll1 ; fastisel should not fold add with non-pointer bitwidth
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dfastisel-gep-promote-before-add.ll1 ; fastisel should not fold add with non-pointer bitwidth
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-fastisel-gep-promote-before-add.ll1 ; fastisel should not fold add with non-pointer bitwidth
/llvm-project-15.0.7/llvm/test/Transforms/Float2Int/
H A Dtoolarge.ll9 ; up to i64, so it should fail (even though the max integer bitwidth is 256).
/llvm-project-15.0.7/mlir/test/lib/Dialect/Test/
H A DTestInterfaces.td60 InterfaceMethod<"Returns the bitwidth of the type plus 'arg'.",
77 InterfaceMethod<"Returns the bitwidth of the given integer type.",
/llvm-project-15.0.7/mlir/lib/Target/SPIRV/Deserialization/
H A DDeserializer.cpp1113 auto checkOperandSizeForBitwidth = [&](unsigned bitwidth) -> LogicalResult { in processConstant() argument
1114 if (bitwidth == 64) { in processConstant()
1121 if (bitwidth <= 32) { in processConstant()
1131 << bitwidth; in processConstant()
1137 auto bitwidth = intType.getWidth(); in processConstant() local
1138 if (failed(checkOperandSizeForBitwidth(bitwidth))) { in processConstant()
1143 if (bitwidth == 64) { in processConstant()
1152 } else if (bitwidth <= 32) { in processConstant()
1153 value = APInt(bitwidth, operands[2], /*isSigned=*/true); in processConstant()
1170 auto bitwidth = floatType.getWidth(); in processConstant() local
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