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Searched refs:bif (Results 1 – 25 of 34) sorted by relevance

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/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask.ll16 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
48 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
112 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
128 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
140 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
152 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
164 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
176 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
260 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
275 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
[all …]
H A Daarch64-bif-gen.ll11 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
25 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
39 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
53 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
65 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
77 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
89 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
103 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
115 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
127 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
[all …]
H A Dvector-fcopysign.ll14 ; CHECK-NEXT: bif.8b v0, v1, v2
27 ; CHECK-NEXT: bif.8b v0, v1, v2
46 ; CHECK-NEXT: bif.16b v0, v1, v2
61 ; CHECK-NEXT: bif.16b v0, v1, v2
76 ; CHECK-NEXT: bif.8b v0, v1, v2
87 ; CHECK-NEXT: bif.8b v0, v1, v2
102 ; CHECK-NEXT: bif.16b v0, v1, v2
115 ; CHECK-NEXT: bif.16b v0, v1, v2
224 ; FP16-NEXT: bif.8b v0, v1, v2
268 ; FP16-NEXT: bif.8b v0, v1, v2
[all …]
H A Darm64-fcopysign.ll12 ; CHECK-NEXT: bif.16b v0, v1, v2
27 ; CHECK-NEXT: bif.16b v0, v1, v2
44 ; CHECK-NEXT: bif.16b v0, v1, v2
61 ; CHECK-NEXT: bif.16b v1, v0, v2
H A Darm64-neon-select_cc.ll12 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
51 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
93 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
107 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
121 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
135 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
148 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
162 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
217 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
241 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
[all …]
H A Dmin-max.ll210 ; CHECK-ISEL-NEXT: bif v0.8b, v1.8b, v2.8b
230 ; CHECK-ISEL-NEXT: bif v0.16b, v1.16b, v2.16b
238 ; CHECK-GLOBAL-NEXT: bif v0.16b, v1.16b, v2.16b
251 ; CHECK-ISEL-NEXT: bif v1.16b, v3.16b, v4.16b
252 ; CHECK-ISEL-NEXT: bif v0.16b, v2.16b, v5.16b
474 ; CHECK-ISEL-NEXT: bif v0.8b, v1.8b, v2.8b
494 ; CHECK-ISEL-NEXT: bif v0.16b, v1.16b, v2.16b
515 ; CHECK-ISEL-NEXT: bif v1.16b, v3.16b, v4.16b
516 ; CHECK-ISEL-NEXT: bif v0.16b, v2.16b, v5.16b
738 ; CHECK-ISEL-NEXT: bif v0.8b, v1.8b, v2.8b
[all …]
H A Dminmax.ll126 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
140 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
151 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
163 ; CHECK-NEXT: bif v0.16b, v2.16b, v4.16b
164 ; CHECK-NEXT: bif v1.16b, v3.16b, v5.16b
H A Dqmovn.ll91 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
94 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
113 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
116 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
H A Dsve-fixed-length-int-vselect.ll14 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
26 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
126 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
139 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
239 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
252 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
353 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
366 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
H A Dunfold-masked-merge-vector-variablemask-const.ll65 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
78 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
171 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
184 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
H A Dfcopysign.ll101 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
125 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
148 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
H A Dsve-fixed-length-int-select.ll15 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
28 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
144 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
157 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
273 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
286 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
397 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
410 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
H A Dsve-fixed-length-fp-select.ll15 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
28 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
144 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
157 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
268 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
281 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
H A Dsve-fixed-length-fp-vselect.ll14 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
27 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
127 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
140 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
241 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
254 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
H A Dsqrt-fastmath.ll76 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
99 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
130 ; CHECK-NEXT: bif v0.16b, v2.16b, v4.16b
133 ; CHECK-NEXT: bif v1.16b, v3.16b, v5.16b
211 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
248 ; CHECK-NEXT: bif v0.16b, v2.16b, v4.16b
251 ; CHECK-NEXT: bif v1.16b, v3.16b, v5.16b
H A Df16-instructions.ll1104 ; CHECK-CVT-NEXT: bif.16b v0, v1, v2
1110 ; CHECK-FP16-NEXT: bif.16b v0, v1, v2
1121 ; CHECK-CVT-NEXT: bif.16b v0, v1, v2
1128 ; CHECK-FP16-NEXT: bif.16b v0, v1, v2
1141 ; CHECK-CVT-NEXT: bif.16b v0, v1, v2
1148 ; CHECK-FP16-NEXT: bif.16b v0, v1, v2
1164 ; CHECK-CVT-NEXT: bif.16b v0, v1, v2
1169 ; CHECK-FP16-NEXT: bif.16b v0, v1, v2
H A Dneon-bitwise-instructions.ll64 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
76 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
665 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
678 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
690 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
702 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
714 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
727 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
882 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
H A Dfp16-vector-shuffle.ll8 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
25 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
H A Dvecreduce-umax-legalization.ll92 ; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
H A Dsat-add.ll466 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
627 ; CHECK-NEXT: bif v0.16b, v2.16b, v3.16b
/llvm-project-15.0.7/clang/test/SemaTemplate/
H A Dcxx1z-using-declaration.cpp99 B<X, Y, int, float> bif; variable
100 int *pi = bif;
101 float *pf = bif;
102 char *pc = bif; // expected-error {{ambiguous}}
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AArch64/
H A Dvector-select.ll12 ; CODE-NEXT: bif v{{.+}}.8b, v{{.+}}.8b, v{{.+}}.8b
28 ; CODE-NEXT: bif v{{.+}}.16b, v{{.+}}.16b, v{{.+}}.16b
60 ; CODE-NEXT: bif v{{.+}}.16b, v{{.+}}.16b, v{{.+}}.16b
76 ; CODE-NEXT: bif v{{.+}}.8b, v{{.+}}.8b, v{{.+}}.8b
129 ; CODE: bif
130 ; CODE: bif
148 ; CODE-NEXT: bif v{{.+}}.16b, v{{.+}}.16b, v{{.+}}.16b
166 ; CODE-NEXT: bif v{{.+}}.8b, v{{.+}}.8b, v{{.+}}.8b
200 ; CODE-NEXT: bif v{{.+}}.8b, v{{.+}}.8b, v{{.+}}.8b
250 ; CODE-NEXT: bif v{{.+}}.8b, v{{.+}}.8b, v{{.+}}.8b
[all …]
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Dneon-bitwise-instructions.s41 bif v0.8b, v1.8b, v2.8b
42 bif v0.16b, v1.16b, v2.16b
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dcombine-udiv.ll86 ; GISEL-NEXT: bif v0.16b, v1.16b, v2.16b
130 ; GISEL-NEXT: bif v0.16b, v1.16b, v2.16b
171 ; GISEL-NEXT: bif v0.16b, v1.16b, v2.16b
215 ; GISEL-NEXT: bif v0.16b, v1.16b, v2.16b
273 ; GISEL-NEXT: bif v0.16b, v1.16b, v2.16b
/llvm-project-15.0.7/clang/docs/
H A DThreadSafetyAnalysis.rst528 bif(); // No warning. (Should have EXCLUDES(mu)).
531 void bif() EXCLUDES(mu);
562 bif(); // WARNING! Missing REQUIRES(!mu).
565 void bif() REQUIRES(!mu);

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