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/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dmips-bad-branches.s363 bc1f -131068
364 bc1f -131069
365 bc1f -131070
366 bc1f -131071
367 bc1f -131072
368 bc1f -131073
369 bc1f 131068
370 bc1f 131069
371 bc1f 131070
372 bc1f 131071
[all …]
H A Dmicromips-bad-branches.s98 # CHECK: bc1f 65535
100 # CHECK: bc1f 65536
204 bc1f -65535
205 bc1f -65536
206 bc1f -65537
207 bc1f 65534
208 bc1f 65535
209 bc1f 65536
214 bc1f $fcc0, 65534
215 bc1f $fcc0, 65535
[all …]
H A Dmips-jump-instructions.s13 # CHECK32: bc1f 1332 # encoding: [0x4d,0x01,0x00,0x45]
38 # CHECK64: bc1f 1332 # encoding: [0x4d,0x01,0x00,0x45]
65 bc1f 1332
H A Dmips-jump-delay-slots.s9 # CHECK: bc1f 1332
11 bc1f 1332
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dfpbr.ll13 ; 32-FCC: bc1f $BB0_2
15 ; 64-FCC: bc1f .LBB0_2
49 ; 32-FCC: bc1f $BB1_2
51 ; 64-FCC: bc1f .LBB1_2
111 ; 32-FCC: bc1f $BB3_2
113 ; 64-FCC: bc1f .LBB3_2
143 ; 32-FCC: bc1f $BB4_2
145 ; 64-FCC: bc1f .LBB4_2
H A Danalyzebranch.ll16 ; MIPS32-NEXT: bc1f $BB0_2
37 ; MIPS32R2-NEXT: bc1f $BB0_2
78 ; MIPS4-NEXT: bc1f .LBB0_2
96 ; MIPS64-NEXT: bc1f .LBB0_2
114 ; MIPS64R2-NEXT: bc1f .LBB0_2
173 ; MIPS32-NEXT: bc1f $BB1_2
191 ; MIPS32R2-NEXT: bc1f $BB1_2
229 ; MIPS4-NEXT: bc1f .LBB1_2
247 ; MIPS64-NEXT: bc1f .LBB1_2
265 ; MIPS64R2-NEXT: bc1f .LBB1_2
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips1/
H A Dinvalid-xfail.txt8 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
/llvm-project-15.0.7/llvm/test/MC/Mips/mips1/
H A Dvalid.s22 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
23 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips4/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r2/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encod…
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encod…
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r3/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encod…
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64r5/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encod…
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips2/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32r5/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encod…
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encod…
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32r2/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encod…
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips32r3/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encod…
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32/
H A Dvalid.s22 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
23 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
24 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips3/
H A Dinvalid-xfail.txt10 0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32r5/
H A Dvalid.s22 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
23 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
24 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32r2/
H A Dvalid.s22 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
23 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
24 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips32r3/
H A Dvalid.s22 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
23 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
24 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips2/
H A Dvalid.s22 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
23 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
/llvm-project-15.0.7/llvm/test/MC/Mips/mips64/
H A Dvalid.s19 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
20 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
21 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]

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