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/llvm-project-15.0.7/mlir/test/Transforms/
H A Dcontrol-flow-sink.mlir31 ^bb0(%arg3: i32):
34 ^bb0(%arg3: i32):
38 ^bb0(%arg3: i32):
74 ^bb0(%arg3: i32):
77 ^bb0(%arg3: i32):
80 ^bb0(%arg3: i32):
84 ^bb0(%arg3: i32):
87 ^bb0(%arg3: i32):
90 ^bb0(%arg3: i32):
125 ^bb0(%arg3: i32):
[all …]
/llvm-project-15.0.7/mlir/test/IR/
H A Dvisitors.mlir38 // CHECK: Visiting block ^bb0 from region 0 from operation 'scf.for'
39 // CHECK: Visiting block ^bb0 from region 0 from operation 'scf.if'
40 // CHECK: Visiting block ^bb0 from region 1 from operation 'scf.if'
61 // CHECK: Visiting block ^bb0 from region 0 from operation 'scf.if'
62 // CHECK: Visiting block ^bb0 from region 1 from operation 'scf.if'
79 // CHECK: Erasing block ^bb0 from region 0 from operation 'scf.for'
91 // CHECK: Erasing block ^bb0 from region 0 from operation 'scf.if'
92 // CHECK: Erasing block ^bb0 from region 1 from operation 'scf.if'
107 // CHECK: Erasing block ^bb0 from region 0 from operation 'scf.if'
108 // CHECK: Erasing block ^bb0 from region 1 from operation 'scf.if'
[all …]
H A Doperation-equality.mlir32 ^bb0(%a : i32):
35 ^bb0(%a : i32):
44 ^bb0(%a : i32 loc("bar")):
47 ^bb0(%a : i32 loc("bar")):
72 ^bb0(%arg0 : i32, %arg1 : f32):
79 ^bb0(%arg0 : i32, %arg1 : f32):
88 ^bb0(%arg0 : i32, %arg1 : f32):
95 ^bb0(%arg0 : i32, %arg1 : f32):
110 ^bb0(%arg0 : i32, %arg1 : f32):
114 ^bb0(%arg0 : i32, %arg1 : f32):
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dswitch-width.ll23 i64 1, label %sw.bb0
27 sw.bb0:
61 i32 1, label %sw.bb0
65 sw.bb0:
100 i32 1, label %sw.bb0
104 sw.bb0:
144 sw.bb0:
184 sw.bb0:
225 sw.bb0:
264 sw.bb0:
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/X86/
H A Dwiden_switch.ll12 i16 1, label %sw.bb0
16 sw.bb0:
26 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
33 ; X86-NEXT: i32 1, label %sw.bb0
43 i17 10, label %sw.bb0
47 sw.bb0:
63 ; X86-NEXT: i32 10, label %sw.bb0
69 ; DEBUG-NEXT: label %sw.bb0
81 i2 1, label %sw.bb0
85 sw.bb0:
[all …]
H A Dcomputedgoto.ll35 ; CHECK: bb0:
69 i32 0, label %bb0
73 bb0:
109 ; CHECK: bb0:
137 i32 0, label %bb0
141 bb0:
173 ; CHECK: bb0:
188 br label %bb0
190 bb0:
240 bb0:
[all …]
H A Dswitch-phi-const.ll8 ; CHECK-NEXT: bb0:
42 bb0:
66 %x2 = phi i32 [ 50, %bb0 ], [ 50, %bb0 ], [ %x1, %case_42 ]
67 %x2.2 = phi i32 [ 51, %bb0 ], [ 51, %bb0 ], [ %x1, %case_42 ]
91 ; CHECK-NEXT: bb0:
107 bb0:
132 ; CHECK-NEXT: bb0:
141 bb0:
151 %x = phi i32 [0, %bb0], [42, %bb1]
164 ; CHECK-NEXT: bb0:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dcgp-bitfield-extract.ll13 ; OPT: bb0:
43 bb0:
63 ; OPT: bb0:
83 bb0:
104 ; OPT: bb0:
140 bb0:
164 ; OPT: bb0:
191 bb0:
212 ; OPT: bb0:
239 bb0:
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/AArch64/
H A Dwiden_switch.ll11 i16 1, label %sw.bb0
15 sw.bb0:
25 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
31 ; ARM64-NEXT: i32 1, label %sw.bb0
41 i17 10, label %sw.bb0
45 sw.bb0:
55 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
61 ; ARM64-NEXT: i32 10, label %sw.bb0
72 i2 1, label %sw.bb0
76 sw.bb0:
[all …]
/llvm-project-15.0.7/mlir/test/Analysis/
H A Dtest-foo-analysis.mlir39 "test.branch"() [^bb0, ^bb1] {tag = "init", foo = 1 : ui64} : () -> ()
41 ^bb0:
61 "test.branch"() [^bb0] {tag = "init", foo = 1 : ui64} : () -> ()
63 ^bb0:
66 "test.branch"() [^bb0, ^bb1] : () -> ()
79 "test.branch"() [^bb0] {tag = "init", foo = 2 : ui64} : () -> ()
81 ^bb0:
84 "test.branch"() [^bb0, ^bb1] : () -> ()
89 "test.branch"() [^bb0, ^bb2] : () -> ()
/llvm-project-15.0.7/mlir/test/Analysis/DataFlow/
H A Dtest-dead-code-analysis.mlir5 // CHECK: ^bb0 = live
8 // CHECK: from ^bb0 = live
64 // CHECK: ^bb0 = live
75 // CHECK: ^bb0 = live
123 // CHECK: ^bb0 = live
141 // CHECK: ^bb0 = live
143 // CHECK: ^bb0 = live
146 ^bb0:
149 ^bb0:
157 // CHECK: ^bb0 = live
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dand-sink.ll15 ; CHECK-NEXT: # %bb.1: # %bb0
31 bb0:
32 ; CHECK-CGP-LABEL: bb0:
79 bb0:
80 ; CHECK-CGP-LABEL: bb0:
125 bb0:
126 ; CHECK-CGP-LABEL: bb0:
168 bb0:
169 ; CHECK-CGP-LABEL: bb0:
219 bb0:
[all …]
H A Dswitch.ll1470 i8 0, label %bb0 i8 1, label %bb0 i8 2, label %bb0 i8 3, label %bb0
1471 i8 4, label %bb0 i8 5, label %bb0 i8 6, label %bb0 i8 7, label %bb0
1472 i8 8, label %bb0 i8 9, label %bb0 i8 10, label %bb0 i8 11, label %bb0
1473 i8 12, label %bb0 i8 13, label %bb0 i8 14, label %bb0 i8 15, label %bb0
1474 i8 16, label %bb0 i8 17, label %bb0 i8 18, label %bb0 i8 19, label %bb0
1475 i8 20, label %bb0 i8 21, label %bb0 i8 22, label %bb0 i8 23, label %bb0
1476 i8 24, label %bb0 i8 25, label %bb0 i8 26, label %bb0 i8 27, label %bb0
1477 i8 28, label %bb0 i8 29, label %bb0 i8 30, label %bb0 i8 31, label %bb0
1478 i8 32, label %bb0 i8 33, label %bb0 i8 34, label %bb0 i8 35, label %bb0
1479 i8 36, label %bb0 i8 37, label %bb0 i8 38, label %bb0 i8 39, label %bb0
[all …]
H A Dswitch-phi-const.ll8 ; CHECK: # %bb.0: # %bb0
13 ; CHECK-NEXT: # %bb.1: # %bb0
39 bb0:
51 %x0 = phi i32 [ 1, %bb0 ], [ %x5, %case_7 ]
63 %x2 = phi i32 [ 13, %bb0 ], [ %x1, %case_5 ]
69 %x3 = phi i32 [ 42, %bb0 ], [ %x2, %case_13 ]
75 %x4 = phi i32 [ 42, %bb0 ], [ 55, %case_42 ]
93 ; CHECK: # %bb.0: # %bb0
99 ; CHECK-NEXT: # %bb.1: # %bb0
127 bb0:
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/BranchProbabilityInfo/
H A Dswitch.ll11 ;CHECK: edge entry -> bb0 probability is 0x26666666 / 0x80000000 = 30.00%
12 ;CHECK: edge entry -> bb0 probability is 0x26666666 / 0x80000000 = 30.00%
13 ;CHECK: edge entry -> bb0 probability is 0x26666666 / 0x80000000 = 30.00%
20 ;CHECK: edge bb0 -> return probability is 0x80000000 / 0x80000000 = 100.00% [HOT edge]
26 i32 0, label %bb0
27 i32 3, label %bb0
28 i32 6, label %bb0
37 bb0: ; preds = %entry, %entry, %entry
49 return: ; preds = %bb2, %bb1, %bb0, %entry
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dand-sink.ll18 br i1 %c, label %bb0, label %bb2
19 bb0:
20 ; CHECK-CGP-LABEL: bb0:
48 br i1 %c, label %bb0, label %bb3
49 bb0:
50 ; CHECK-CGP-LABEL: bb0:
63 br i1 %cmp, label %bb2, label %bb0
81 br label %bb0
82 bb0:
83 ; CHECK-CGP-LABEL: bb0:
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/
H A Dtraits.mlir7 ^bb0(%arg0: tensor<i32>, %arg1: tensor<i32>):
15 ^bb0(%arg0: tensor<4xi32>, %arg1: tensor<i32>):
24 ^bb0(%arg0: tensor<4x3x2xi32>, %arg1: tensor<3x1xi32>):
60 ^bb0(%arg0: tensor<4xf32>, %arg1: tensor<4xf32>):
70 ^bb0(%arg0: tensor<4x3x2xi32>, %arg1: tensor<3x3xi32>):
99 ^bb0(%arg0: tensor<2xi32>, %arg1: tensor<2xi32>):
107 ^bb0(%arg0: tensor<4x3x2xi32>, %arg1: tensor<?xi32>):
123 ^bb0(%arg0: tensor<*xi32>, %arg1: tensor<*xi32>):
132 ^bb0(%arg0: tensor<3x2xi32>, %arg1: tensor<*xi32>):
140 ^bb0(%arg0: tensor<3x2xi32>, %arg1: tensor<*xi32>):
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/Transform/
H A Dops-invalid.mlir11 ^bb0(%arg0: !pdl.operation):
22 ^bb0(%arg0: !pdl.operation):
31 ^bb0(%arg0: !pdl.operation):
40 ^bb0(%arg0: !pdl.operation):
51 ^bb0(%arg0: !pdl.operation):
66 ^bb0(%arg0: !pdl.operation):
75 ^bb0(%arg0: !pdl.operation):
91 ^bb0(%arg0: !pdl.operation):
100 ^bb0(%arg0: !pdl.operation):
112 ^bb0(%arg0: !pdl.operation):
[all …]
H A Dtest-interpreter.mlir32 ^bb0(%arg0: !pdl.operation):
34 ^bb0(%arg1: !pdl.operation):
51 ^bb0(%arg0: !pdl.operation):
54 ^bb0(%arg1: !pdl.operation):
63 ^bb0(%arg0: !pdl.operation):
65 ^bb0(%arg1: !pdl.operation):
76 ^bb0(%arg0: !pdl.operation):
116 ^bb0(%arg0: !pdl.operation):
140 ^bb0(%arg0: !pdl.operation):
178 ^bb0(%arg0: !pdl.operation):
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SimplifyCFG/
H A Dcleanup-phis.ll10 bb0:
14 bb1: ; preds = %bb0
21 ehcleanup: ; preds = %bb1, %bb0
22 %phi0 = phi i32 [ 0, %bb0 ], [ 1, %bb1 ]
23 %phi1 = phi i32 [ 2, %bb0 ], [ 3, %bb1 ]
30 ; CHECK-NEXT: %phi0 = phi i32 [ 0, %bb0 ], [ 1, %bb1 ]
31 ; CHECK-NEXT: %phi1 = phi i32 [ 2, %bb0 ], [ 3, %bb1 ]
/llvm-project-15.0.7/polly/test/ScopDetect/
H A Dmultidim_indirect_access.ll17 ; CHECK: Valid Region for Scop: bb1 => bb0
23 br label %bb0
25 bb0:
32 bb1: ; preds = %bb7, %bb0
33 %i = phi i64 [ %i.next, %bb1 ], [ 1, %bb0 ]
34 %.0 = phi i32* [ %A, %bb0 ], [ %tmp12, %bb1 ]
42 br i1 %exitcond, label %bb1, label %bb0
/llvm-project-15.0.7/llvm/test/Transforms/GVN/
H A Dunreachable_block_infinite_loop.ll17 br label %bb0
22 br i1 undef, label %bb0, label %bb1
24 bb0:
32 br label %bb0
37 br i1 undef, label %bb0, label %bb1
39 bb0:
/llvm-project-15.0.7/llvm/test/Transforms/NewGVN/
H A Dunreachable_block_infinite_loop.ll17 br label %bb0
22 br i1 undef, label %bb0, label %bb1
24 bb0:
32 br label %bb0
37 br i1 undef, label %bb0, label %bb1
39 bb0:
/llvm-project-15.0.7/llvm/test/Verifier/
H A Ddominates.ll14 bb0:
19 %y2 = phi i32 [%y1, %bb0]
26 ; CHECK-NEXT: %y2 = phi i32 [ %y1, %bb0 ]
30 bb0:
48 bb0:
51 %y3 = phi i32 [%y1, %bb0]
56 ; CHECK-NEXT: %y3 = phi i32 [ %y1, %bb0 ]
73 bb0:
/llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/ARM/
H A Dtailcall-dup.ll16 bb0:
26 %retval = phi i8* [ %tmp0, %bb0 ], [ %tmp1, %bb1 ]
38 bb0:
45 %retval = phi i8* [ %tmp0, %bb0 ], [ %tmp1, %bb1 ]
55 bb0:
62 %retval = phi i8* [ %tmp0, %bb0 ], [ %tmp1, %bb1 ]
75 bb0:
82 %retval = phi i8* [ %tmp0, %bb0 ], [ %tmp1, %bb1 ]

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